发明授权
US07045408B2 Integrated circuit with improved channel stress properties and a method for making it
失效
具有改善的通道应力特性的集成电路及其制造方法
- 专利标题: Integrated circuit with improved channel stress properties and a method for making it
- 专利标题(中): 具有改善的通道应力特性的集成电路及其制造方法
-
申请号: US10443152申请日: 2003-05-21
-
公开(公告)号: US07045408B2公开(公告)日: 2006-05-16
- 发明人: Thomas Hoffmann , Chris Auth , Mark Armstrong , Stephen Cea
- 申请人: Thomas Hoffmann , Chris Auth , Mark Armstrong , Stephen Cea
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理商 Rahul D. Engineer
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238 ; H01L21/84 ; H01L21/00 ; H01L21/461 ; H01L21/31
摘要:
An integrated circuit is described that comprises a PMOS transistor and an NMOS transistor that are formed on a semiconductor substrate. A silicate glass layer is formed on only the PMOS transistor or the NMOS transistor; and an etch stop layer is formed on the silicate glass layer. Also described is a method for forming an integrated circuit. That method comprises forming a PMOS transistor structure and an NMOS transistor structure on a semiconductor substrate, forming a silicate glass layer on only the PMOS transistor structure or the NMOS transistor structure, and forming an etch stop layer on the silicate glass layer.