- 专利标题: Suppressing digital-to-analog converter (DAC) error
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申请号: US10723472申请日: 2003-11-26
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公开(公告)号: US07053808B2公开(公告)日: 2006-05-30
- 发明人: Feng Chen
- 申请人: Feng Chen
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Wade James Brady, III; Frederick J. Telecky, Jr.
- 主分类号: H03M1/66
- IPC分类号: H03M1/66 ; H03M1/06
摘要:
A digital-to-analog converter (DAC) error suppression arrangement suppresses DAC error arising from mismatched elements contained in a DAC (640 and/or 645) that is part of a modulator (FIG. 6). A low pass averaging (LPA) index decoder 650 controls a shifting arrangement 635 to shift a digital word T2 derived from modulator output Y so that the DAC error distribution constitutes a low pass profile (FIG. 5). Thus, DAC error is suppressed at higher frequencies (close to half the sampling rate), thereby providing improved spurious free dynamic range (SFDR). The LPA index decoder 650 causes the shifting arrangement 635 to shift the digital word T2 using only a single pointer per clock cycle.
公开/授权文献
- US20050110664A1 Suppressing digital-to-analog converter (DAC) error 公开/授权日:2005-05-26