发明授权
- 专利标题： Multiple chip semiconductor arrangement having electrical components in separating regions
- 专利标题（中）： 在分离区域中具有电气部件的多芯片半导体布置
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申请号： US10841162申请日： 2004-05-07
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公开(公告)号： US07060529B2公开(公告)日： 2006-06-13
- 发明人: Manfred Reithinger , Mike Killian , Gerd Frankowsky , Oliver Kiehl , Gerhard Mueller , Ernst Stahl , Hartmud Terletzki , Thomas Vogelsang
- 申请人： Manfred Reithinger , Mike Killian , Gerd Frankowsky , Oliver Kiehl , Gerhard Mueller , Ernst Stahl , Hartmud Terletzki , Thomas Vogelsang
- 申请人地址： DE Munich
- 专利权人： Infineon Technologies AG
- 当前专利权人： Infineon Technologies AG
- 当前专利权人地址： DE Munich
- 代理机构： Slater & Matsil, L.L.P.
- 主分类号： H01L21/50
- IPC分类号： H01L21/50 ; H01L21/30
摘要：
A semiconductor packaging arrangement, or module, includes a printed circuit board having an electrical interconnect thereon and a semiconductor package mounted to the printed circuit board. The semiconductor package includes a fractional portion of a semiconductor wafer having a plurality of integrated circuit chips thereon, such chips being separated by regions in the fractional portion of the wafer. The fractional portion of the wafer has a plurality of electrical contacts electrically connected to the chips. The package also includes a dielectric member having an electrical conductor thereon. The electrical conductor are electrically connected to the plurality of electrical contacts of the plurality of chips to electrically interconnect such plurality of chips with portions of the electrical conductor spanning the regions in the fractional portion of the wafer. A connector is provided for electrically connecting the electrical conductor of the package to the electrical interconnect of the printed circuit board.
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