发明授权
US07062692B1 Duty cycle characterization and adjustment 有权
占空比表征和调整

  • 专利标题: Duty cycle characterization and adjustment
  • 专利标题(中): 占空比表征和调整
  • 申请号: US10255502
    申请日: 2002-09-26
  • 公开(公告)号: US07062692B1
    公开(公告)日: 2006-06-13
  • 发明人: Austin H. Lesea
  • 申请人: Austin H. Lesea
  • 申请人地址: US CA San Jose
  • 专利权人: Xilinx, Inc.
  • 当前专利权人: Xilinx, Inc.
  • 当前专利权人地址: US CA San Jose
  • 代理商 W. Eric Webostad; LeRoy D. Maunu; Edel M. Young
  • 主分类号: G01R31/28
  • IPC分类号: G01R31/28
Duty cycle characterization and adjustment
摘要:
Method and apparatus are described for duty cycle determination and adjustment. More particularly, an output signal is sampled and provided to duty cycle check circuitry which characterizes the duty cycle of the sampled output signal. This characterization may be provided to a wafer prober or integrated circuit tester to determine whether duty cycle is within an acceptance range. Alternatively, the duty cycle indicator signal may be provided to drive adjustment circuitry. In response to duty cycle not being within an acceptance range, drive adjust circuitry provides a drive adjustment signal to adjust duty cycle at an output buffer by turning on one or more p-channel drive transistors, one or more n-channel drive transistors, or a combination of both. Moreover, wells may be biased responsive to a detected duty cycle in order to correct the duty cycle.
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