发明授权
- 专利标题: Flat display panel having internal power supply circuit for reducing power consumption
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申请号: US09974806申请日: 2001-10-12
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公开(公告)号: US07068264B2公开(公告)日: 2006-06-27
- 发明人: Shigetoshi Tomio , Naoki Matsui , Shinpei Yao
- 申请人: Shigetoshi Tomio , Naoki Matsui , Shinpei Yao
- 申请人地址: JP Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JP Tokyo
- 代理机构: Staas & Halsey LLP
- 优先权: JP5-290868 19931119
- 主分类号: G09G5/00
- IPC分类号: G09G5/00
摘要:
A flat display employs at least one high voltage different from logic voltages. The display has a voltage detection unit and a drive control signal control unit. The voltage detection unit is used to detect the high voltage. The drive control signal control unit is used to control drive control signals of the flat display in accordance with the detected high voltage. This arrangement eliminates charging currents that are applied to a display panel but have nothing to do on the actual displaying of data, or reactive currents due to unnecessary switching operations, thereby reducing power consumption.
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