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    Capacitive load driving circuit for driving capacitive loads such as pixels in plasma display panel, and plasma display apparatus
    1.
    发明授权
    Capacitive load driving circuit for driving capacitive loads such as pixels in plasma display panel, and plasma display apparatus 失效
    用于驱动诸如等离子体显示面板中的像素的电容性负载的电容负载驱动电路和等离子体显示装置

    公开(公告)号：US07211963B2

    公开(公告)日：2007-05-01

    申请号：US11072604

    申请日：2005-03-07

    申请人： Makoto Onozawa ,  Shigetoshi Tomio

    发明人： Makoto Onozawa ,  Shigetoshi Tomio

    IPC分类号： G09G3/10

    CPC分类号： G09G3/2965 ,  G09G3/296 ,  G09G3/299 ,  G09G2360/142

    摘要： A capacitive load driving circuit has an input terminal, a front-edge delay circuit delaying a front edge of an input signal input via the input terminal, a back-edge delay circuit delaying a back edge of the input signal, an amplifying circuit amplifying a drive control signal obtained through the front-edge delay circuit and the back-edge delay circuit, and an output switch device which is driven by the amplifying circuit. The front-edge delay circuit includes a first time-constant circuit having a first resistor and a first capacitor, the back-edge delay circuit includes a second time-constant circuit having a second resistor and a second capacitor, and the drive control signal is generated by a signal combining circuit which combines an output signal of the first-time constant circuit with an output signal of the second-time constant circuit.

    摘要翻译： 电容性负载驱动电路具有输入端子，延迟经由输入端子输入的输入信号的前沿的前沿延迟电路，延迟输入信号的后沿的后沿延迟电路，放大电路 通过前沿延迟电路和后沿延迟电路获得的驱动控制信号，以及由放大电路驱动的输出开关器件。 前沿延迟电路包括具有第一电阻器和第一电容器的第一时间常数电路，后沿延迟电路包括具有第二电阻器和第二电容器的第二时间常数电路，驱动控制信号为 由将第一次恒定电路的输出信号与第二次恒定电路的输出信号组合的信号组合电路产生。

    Plasma display panel, method of driving same and plasma display apparatus
    3.
    发明授权
    Plasma display panel, method of driving same and plasma display apparatus 失效
    等离子体显示面板，驱动方法和等离子体显示装置

    公开(公告)号：US06373452B1

    公开(公告)日：2002-04-16

    申请号：US08690038

    申请日：1996-07-31

    申请人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

    发明人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

    IPC分类号： G09G328

    CPC分类号： H01J11/28 ,  G09G3/2018 ,  G09G3/292 ,  G09G3/293 ,  G09G3/2932 ,  G09G3/294 ,  G09G3/2948 ,  G09G3/296 ,  G09G3/2983 ,  G09G3/299 ,  G09G2310/0205 ,  G09G2310/0218 ,  G09G2310/0221 ,  G09G2310/0224 ,  G09G2330/021 ,  H01J11/12 ,  H01J11/44 ,  H01J2211/444

    摘要： An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame. Alternate areas between the surface discharge electrodes are assigned as blind lines and a discharge light emission in the blind lines is blocked or incident light to the blind lines from the outside is absorbed. Address electrodes are provided for each monochromatic pixel column and selectively connected with the pads above them, performing simultaneous selection of lines.

    摘要翻译： 电极驱动电路进行隔行扫描，确保表面放电电极之间的L1〜L8中的奇数行和偶数行中的维持脉冲的相位彼此相反。 这样，当显示奇数行或偶数行时，施加在未显示行的电极之间的电压为0，消除了在表面放电电极上分隔壁的必要性。 在表面放电电极中，X电极设置在Y电极的两侧，并且一侧的Y电极和X电极之间的区域被指定为奇数帧的显示线，并且Y电极 并且在另一侧的X电极被分配有偶数帧中的显示行。 表面放电电极之间的交替区域被分配为盲线，并且盲线中的放电发光被阻挡，或者从外部吸收到盲线的入射光。 为每个单色像素列提供地址电极，并选择性地与其上的焊盘连接，执行行的同时选择。

    PLASMA DISPLAY DEVICE
    4.
    发明申请
    PLASMA DISPLAY DEVICE 审中-公开

    公开(公告)号：US20120001836A1

    公开(公告)日：2012-01-05

    申请号：US13237382

    申请日：2011-09-20

    申请人： Yoshikazu KANAZAWA ,  Shigetoshi TOMIO ,  Takashi FUJISAKI

    发明人： Yoshikazu KANAZAWA ,  Shigetoshi TOMIO ,  Takashi FUJISAKI

    IPC分类号： G09G3/28

    CPC分类号： H01J40/14

    摘要： An electrode drive circuit of a plasma display device includes a scan driver provided with plural drivers having first and second switching elements and first and second diodes, and a positive reset pulse generating circuit by which a first superposed voltage obtained by applying a predetermined first voltage to a low potential side terminal of the second switching element and superposing the first voltage and a voltage between a high potential side terminal of the first switching element and the low potential side terminal of the second switching element is generated to the high potential side terminal of the first switching element. The first superposed voltage is applied to the electrodes via the first switching element.

    Driving circuit device of plasma display panel and plasma display apparatus
    5.
    发明申请
    Driving circuit device of plasma display panel and plasma display apparatus 审中-公开
    等离子体显示面板和等离子体显示装置的驱动电路装置

    公开(公告)号：US20080238908A1

    公开(公告)日：2008-10-02

    申请号：US11896474

    申请日：2007-08-31

    申请人： Tetsuya Sakamoto ,  Akira Otsuka ,  Akihiro Takagi ,  Shigetoshi Tomio

    发明人： Tetsuya Sakamoto ,  Akira Otsuka ,  Akihiro Takagi ,  Shigetoshi Tomio

    IPC分类号： G09G5/00

    CPC分类号： G09G3/2965 ,  G09G2310/066 ,  G09G2330/021

    摘要： In this PDP apparatus, in a sustain driving circuit device for supplying sustain discharge pulses, an energy recovery circuit has a coil, switches, and diodes, and a Vs clamp circuit has switches. In the energy recovery circuit, the switches are connected to a panel capacitor, and the coil is connected to a power source line with an intermediate potential of Vs, and a clamp diode and a power source connected thereto are connected to a node between the coil and the switch. As a control timing, at a timing of less than π/2 of an LC resonance current cycle, the switch of the energy recovery circuit is turned OFF and then the switch of the Vs clamp circuit is turned ON, thereby performing the Vs clamp.

    摘要翻译： 在该PDP装置中，在用于提供维持放电脉冲的维持驱动电路装置中，能量恢复电路具有线圈，开关和二极管，Vs钳位电路具有开关。 在能量恢复电路中，开关连接到面板电容器，线圈连接到具有Vs的中间电位的电源线，并且钳位二极管和连接到其的电源连接到线圈 和开关。 作为控制定时，在LC谐振电流周期小于pi / 2的定时，能量恢复电路的开关断开，然后Vs钳位电路的开关导通，从而进行Vs钳位。

    Plasma Display Device
    6.
    发明申请
    Plasma Display Device 审中-公开
    等离子显示装置

    公开(公告)号：US20080238825A1

    公开(公告)日：2008-10-02

    申请号：US12129236

    申请日：2008-05-29

    申请人： Yoshikazu Kanazawa ,  Shigetoshi Tomio ,  Takashi Fujisaki

    发明人： Yoshikazu Kanazawa ,  Shigetoshi Tomio ,  Takashi Fujisaki

    IPC分类号： G09G3/28 ,  G06F3/038

    CPC分类号： H01J40/14

    摘要： An electrode drive circuit of a plasma display device includes a scan driver provided with plural drivers having first and second switching elements and first and second diodes, and a positive reset pulse generating circuit by which a first superposed voltage obtained by applying a predetermined first voltage to a low potential side terminal of the second switching element and superposing the first voltage and a voltage between a high potential side terminal of the first switching element and the low potential side terminal of the second switching element is generated to the high potential side terminal of the first switching element. The first superposed voltage is applied to the electrodes via the first switching element.

    摘要翻译： 等离子体显示装置的电极驱动电路包括具有多个驱动器的扫描驱动器，该驱动器具有第一和第二开关元件以及第一和第二二极管，以及正复位脉冲发生电路，通过将正的复位脉冲发生电路施加到第 第二开关元件的低电位侧端子并且将第一开关元件的高电位侧端子与第二开关元件的低电位侧端子之间的第一电压和高电位侧端子之间的电压叠加在第二开关元件的高电位侧端子 第一开关元件。 第一重叠电压经由第一开关元件施加到电极。

    Capacitive load drive circuit, method for driving the same, and plasma display apparatus
    10.
    发明申请
    Capacitive load drive circuit, method for driving the same, and plasma display apparatus 审中-公开
    电容负载驱动电路，其驱动方法以及等离子体显示装置

    公开(公告)号：US20050184977A1

    公开(公告)日：2005-08-25

    申请号：US10989463

    申请日：2004-11-17

    申请人： Katsumi Itoh ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Tetsuya Sakamoto ,  Isao Furukawa

    发明人： Katsumi Itoh ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Tetsuya Sakamoto ,  Isao Furukawa

    IPC分类号： H04N5/66 ,  G09G3/20 ,  G09G3/288 ,  G09G3/291 ,  G09G3/294 ,  G09G3/296 ,  G09G3/298 ,  G09G3/299 ,  G09G5/00

    CPC分类号： G09G3/296 ,  G09G3/294 ,  G09G3/299 ,  G09G2330/021

    摘要： A capacitive load drive circuit that has reduced power consumption due to residual carriers, and a PDP apparatus using the same, have been disclosed. In the drive circuit, the power consumption due to the residual carriers, which are formed when a diode provided in parallel to a switch circuit of the capacitive load drive circuit is brought into conduction, is reduced and the switch circuit connected in parallel to the diode is brought into conduction during a period of time from when the diode is brought into conduction until when the potential of a terminal to which the diode is connected changes. By bringing the switch circuit connected in parallel into conduction, a closed circuit is formed by the diode and the switch circuit and the residual carriers formed in the diode are reduced. The voltage of the closed circuit is substantially zero V and, therefore, power consumption is very small even if a current due to the residual carriers flows through the closed circuit.

    摘要翻译： 已经公开了由于残留载波而降低了功耗的电容性负载驱动电路和使用其的PDP装置。 在驱动电路中，与并联于容性负载驱动电路的开关电路的二极管导通时形成的残留载流子所引起的功率消耗减少，开关电路与二极管并联连接 在从二极管导通直至连接二极管的端子的电位变化的时间段内被导通。 通过并联连接的开关电路导通，由二极管和开关电路形成闭合电路，并且形成在二极管中的残留载流子减少。 闭合电路的电压基本上为零V，因此即使由于残留载流子流过的电流流经闭路，功耗也非常小。