发明授权
- 专利标题: Method and system for implementing multiple high precision and low precision interpolators for a graphics pipeline
- 专利标题(中): 用于为图形管线实现多个高精度和低精度内插器的方法和系统
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申请号: US10845640申请日: 2004-05-14
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公开(公告)号: US07079156B1公开(公告)日: 2006-07-18
- 发明人: Edward A. Hutchins , Brian K. Angell
- 申请人: Edward A. Hutchins , Brian K. Angell
- 申请人地址: US CA Santa Clara
- 专利权人: nVidia Corporation
- 当前专利权人: nVidia Corporation
- 当前专利权人地址: US CA Santa Clara
- 主分类号: G09G5/00
- IPC分类号: G09G5/00
摘要:
A rasterizer stage configured to implement multiple interpolators for graphics pipeline. The rasterizer stage includes a plurality of simultaneously operable low precision interpolators for computing a first set of pixel parameters for pixels of a geometric primitive and a plurality of simultaneously operable high precision interpolators for computing a second set of pixel parameters for pixels of the geometric primitive. The rasterizer stage also includes an output mechanism coupled to the interpolators for routing computed pixel parameters into a memory array. Parameters may be programmably assigned to the interpolators and the results thereof may be programmably assigned to portions of a pixel packet.
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