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US07079592B2 Complementary code keying demodulation system 失效
互补码密钥解调系统

Complementary code keying demodulation system
Abstract:
The present invention relates to both of a bi-stage correlation calculation demodulation system, and a fast walsh block demodulation device at a receiver, wherein the bi-stage correlation calculation demodulation system has a characteristic of bi-stage correlation calculation in which the subsequent second-stage correlation calculations are dependent on the first-stage correlation calculation results by utilizing an incomplete orthogonal property within CCK codewords to arrange the CCK codewords operated in the first-stage correlation calculations and second-stage correlation calculations properly and respectively. The fast walsh block demodulation device comprises: a plurality of adders (operators) constructed to be a first-level correlation calculation circuit and a second-level correlation calculation circuit, and a plurality of process modules constructed to be a third-level correlation calculation circuit, the process modules having the functions of picking one maximum value from four values and performing third-level correlation calculation of conventional basic fast walsh block demodulation device.
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