发明授权
US07080169B2 Receiving data from interleaved multiple concurrent transactions in a FIFO memory having programmable buffer zones
有权
在具有可编程缓冲区的FIFO存储器中从交织的多个并发事务接收数据
- 专利标题: Receiving data from interleaved multiple concurrent transactions in a FIFO memory having programmable buffer zones
- 专利标题(中): 在具有可编程缓冲区的FIFO存储器中从交织的多个并发事务接收数据
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申请号: US10120733申请日: 2002-04-10
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公开(公告)号: US07080169B2公开(公告)日: 2006-07-18
- 发明人: John Tang , Jean Xue , Karl M. Henson
- 申请人: John Tang , Jean Xue , Karl M. Henson
- 申请人地址: US CA Costa Mesa
- 专利权人: Emulex Design & Manufacturing Corporation
- 当前专利权人: Emulex Design & Manufacturing Corporation
- 当前专利权人地址: US CA Costa Mesa
- 代理机构: Morrison & Foerster LLP
- 主分类号: G06F3/00
- IPC分类号: G06F3/00 ; G06F13/00
摘要:
A FIFO memory receives data transfer requests before data is stored in the FIFO memory. Multiple concurrent data transfers, delivered to the FIFO memory as interleaved multiple concurrent transactions, can be accommodated by the FIFO memory (i.e., multiplexing between different sources that transmit in distributed bursts). The transfer length requirements associated with the ongoing data transfers are tracked, along with the total available space in the FIFO memory. A programmable buffer zone also can be included in the FIFO memory for additional overflow protection and/or to enable dynamic sizing of FIFO depth.
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