发明授权
US07084035B2 Semiconductor device placing high, medium, and low voltage transistors on the same substrate
失效
将高,中,低压晶体管放置在同一衬底上的半导体器件
- 专利标题: Semiconductor device placing high, medium, and low voltage transistors on the same substrate
- 专利标题(中): 将高,中,低压晶体管放置在同一衬底上的半导体器件
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申请号: US11104433申请日: 2005-04-13
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公开(公告)号: US07084035B2公开(公告)日: 2006-08-01
- 发明人: Naohiro Ueda
- 申请人: Naohiro Ueda
- 申请人地址: JP Tokyo
- 专利权人: Ricoh Company, Ltd.
- 当前专利权人: Ricoh Company, Ltd.
- 当前专利权人地址: JP Tokyo
- 代理机构: Dickstein Shapiro Morin & Oshinsky LLP
- 优先权: JP2004-117701 20040413
- 主分类号: H01L21/8234
- IPC分类号: H01L21/8234
摘要:
A method for forming three kinds of MOS transistors on a single semiconductor substrate, each provided with gate oxides different in thickness from each other, without detracting from the device characteristics. The method includes the steps of forming a dielectric layer for device isolation for defining first, second, and third regions, and buffer oxide layers on the surface of a semiconductor substrate; after forming an oxidation resistance layer, which has an opening for exposing the first region, performing a first thermal oxidation process for forming a first gate oxide layer overlaying the first region; forming a first gate electrode on the first gate oxide layer; removing the buffer oxide layer overlying the third region, having an opening for exposing the third region; performing a second thermal oxidation process for forming a second gate oxide layer, having a thickness different from the first gate oxide, and for forming a third gate oxide layer having a thickness different from the first, and the second gate oxides.
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