发明授权
US07084035B2 Semiconductor device placing high, medium, and low voltage transistors on the same substrate 失效
将高,中,低压晶体管放置在同一衬底上的半导体器件

  • 专利标题: Semiconductor device placing high, medium, and low voltage transistors on the same substrate
  • 专利标题(中): 将高,中,低压晶体管放置在同一衬底上的半导体器件
  • 申请号: US11104433
    申请日: 2005-04-13
  • 公开(公告)号: US07084035B2
    公开(公告)日: 2006-08-01
  • 发明人: Naohiro Ueda
  • 申请人: Naohiro Ueda
  • 申请人地址: JP Tokyo
  • 专利权人: Ricoh Company, Ltd.
  • 当前专利权人: Ricoh Company, Ltd.
  • 当前专利权人地址: JP Tokyo
  • 代理机构: Dickstein Shapiro Morin & Oshinsky LLP
  • 优先权: JP2004-117701 20040413
  • 主分类号: H01L21/8234
  • IPC分类号: H01L21/8234
Semiconductor device placing high, medium, and low voltage transistors on the same substrate
摘要:
A method for forming three kinds of MOS transistors on a single semiconductor substrate, each provided with gate oxides different in thickness from each other, without detracting from the device characteristics. The method includes the steps of forming a dielectric layer for device isolation for defining first, second, and third regions, and buffer oxide layers on the surface of a semiconductor substrate; after forming an oxidation resistance layer, which has an opening for exposing the first region, performing a first thermal oxidation process for forming a first gate oxide layer overlaying the first region; forming a first gate electrode on the first gate oxide layer; removing the buffer oxide layer overlying the third region, having an opening for exposing the third region; performing a second thermal oxidation process for forming a second gate oxide layer, having a thickness different from the first gate oxide, and for forming a third gate oxide layer having a thickness different from the first, and the second gate oxides.
信息查询
IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70 .由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理;集成电路器件或其特殊部件的制造(由预制电组件组成的组装件的制造入H05K3/00,H05K13/00)
H01L21/77 ..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理(电可编程只读存储器或其多步骤的制造方法入H01L27/115)
H01L21/78 ...把衬底连续地分成多个独立的器件(改变表面物理特性或者半导体形状的切割入H01L21/304)
H01L21/82 ....制造器件,例如每一个由许多元件组成的集成电路
H01L21/822 .....衬底是采用硅工艺的半导体的(H01L21/8258优先)
H01L21/8232 ......场效应工艺
H01L21/8234 .......MIS工艺
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