A method for integrating first and second type devices on a semiconductor substrate includes forming openings within an active semiconductor layer of a dual semiconductor-on-insulator in first and second regions of the semiconductor substrate. First and second non-MOS transistor device implant regions are formed within portions of an intermediate semiconductor layer underlying first and second openings, respectively, in a first device portion, filled with a fill material and planarized. A top surface portion of the active semiconductor layer disposed in-between the first and second openings is exposed, first and second low dose non-MOS transistor device well regions are formed in respective first and second portions of the intermediate semiconductor layer underlying a region in-between the first and second openings. The method further includes forming a salicide blocking layer, forming first and second contact vias within the fill material of the first and second openings, respectively, exposing a portion of the underlying intermediate semiconductor layer, forming first and second non-MOS transistor device contact regions in exposed portions of the intermediate semiconductor layer, and saliciding the semiconductor substrate, the salicide blocking layer preventing salicidation of the first and second low dose non-MOS transistor device well regions.