发明授权
US07098116B2 Shallow trench isolation method for reducing oxide thickness variations at different pattern densities
有权
浅沟槽隔离方法可减少不同图案密度下的氧化物厚度变化
- 专利标题： Shallow trench isolation method for reducing oxide thickness variations at different pattern densities
- 专利标题（中）： 浅沟槽隔离方法可减少不同图案密度下的氧化物厚度变化
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申请号： US10753816申请日： 2004-01-08
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公开(公告)号： US07098116B2公开(公告)日： 2006-08-29
- 发明人: Chih-Cheng Lu , Chuan-Ping Hou , Chu-Yun Fu , Chang Wen , Jang Syun Ming
- 申请人： Chih-Cheng Lu , Chuan-Ping Hou , Chu-Yun Fu , Chang Wen , Jang Syun Ming
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Haynes and Boone, LLP
- 主分类号： H01L21/76
- IPC分类号： H01L21/76
摘要：
A method of reducing oxide thickness variations in a STI pattern that includes both a dense trench array and a wide trench is described. A first HDP CVD step with a deposition/sputter (D/S) ratio of 9.5 is used to deposit a dielectric layer with a thickness that is 120 to 130% of the shallow trench depth. An etch back is performed in the same CVD chamber with NF3, SiF4 or NF3 and SiF4 to remove about 40 to 50% of the initial dielectric layer. A second HDP CVD step with a D/S ratio of 16 deposits an additional thickness of dielectric layer to a level that is slightly higher than after the first deposition. The etch back and second deposition form a smoother dielectric layer surface which enables a subsequent planarization step to provide filled STI features with a minimal amount of dishing in wide trenches.