公开(公告)号：US20090257276A1

公开(公告)日：2009-10-15

申请号：US12192137

申请日：2008-08-15

Applicant: Cheng-Da Huang ,  Chih-Cheng Lu ,  Hsin Chen

Inventor： Cheng-Da Huang ,  Chih-Cheng Lu ,  Hsin Chen

IPC: G11C27/00 ,  G11C16/06 ,  G11C7/00

CPC classification number: G11C27/005 ,  G11C16/0441

Abstract: A nonvolatile analog memory has a floating gate point. The nonvolatile analog memory includes a first current source, a second current source, and a current adjuster. The first current source generates a first current, and the second current source generates a second current. The current adjuster turns on or turns off a current path of the second current according to a reference current and the first current. Furthermore, when the current path of the second current is turned on, the first current is adjusted according to the second current, such that the first current is equal to the reference current.

Abstract translation: 非易失性模拟存储器具有浮动栅极点。 非易失性模拟存储器包括第一电流源，第二电流源和电流调节器。 第一电流源产生第一电流，第二电流源产生第二电流。 电流调节器根据参考电流和第一电流打开或关闭第二电流的电流路径。 此外，当第二电流的电流路径导通时，根据第二电流来调节第一电流，使得第一电流等于参考电流。

公开(公告)号：US20050095727A1

公开(公告)日：2005-05-05

申请号：US10701824

申请日：2003-11-05

Applicant: Weng Chang ,  Chih-Cheng Lu ,  Chu-Yun Fu ,  Syun-Ming Jang

Inventor： Weng Chang ,  Chih-Cheng Lu ,  Chu-Yun Fu ,  Syun-Ming Jang

IPC: H01L21/762 ,  H01L23/544 ,  H01L21/66 ,  G01R31/26 ,  H01L21/76

CPC classification number: H01L22/34 ,  H01L21/76229

Abstract: A test region layout for testing shallow trench isolation gap fill characteristics is disclosed. Each test region further comprises at least one test pattern disposed in an interior portion of the test region. In a preferred embodiment, the test pattern is a square shape or, more preferably, two diametrically opposed “L” shapes which are discontinuous with respect to each other. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract translation: 公开了一种用于测试浅沟槽隔离间隙填充特性的测试区域布局。 每个测试区域还包括设置在测试区域的内部部分中的至少一个测试图案。 在优选实施例中，测试图案是相对于彼此不连续的正方形或更优选的两个直径相对的“L”形。 要强调的是，该摘要被提供以符合要求摘要的规则，这将允许搜索者或其他读者快速确定技术公开的主题。 提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

公开(公告)号：US06693047B1

公开(公告)日：2004-02-17

申请号：US10324532

申请日：2002-12-19

Applicant: Chih-Cheng Lu ,  Wen Chang ,  Syun-Ming Jeng

Inventor： Chih-Cheng Lu ,  Wen Chang ,  Syun-Ming Jeng

IPC: H01L2131

CPC classification number: H01L21/02079 ,  H01L21/02032 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31633

Abstract: A method for removing at least one carbon doped oxide layer over a surface to recycle the semiconductor process wafer including providing a semiconductor wafer including a process surface including at least one carbon doped silicon oxide layer; oxidizing the carbon doped oxide layer according to an oxidizing treatment to convert at oxidize at least a portion of the carbon doped oxide layer to produce silicon oxide; and, wet etching the silicon oxide to substantially remove the silicon oxide.

Abstract translation: 一种用于在表面上去除至少一个碳掺杂氧化物层以再循环半导体工艺晶片的方法，包括提供包括至少一个碳掺杂氧化硅层的工艺表面的半导体晶片; 根据氧化处理氧化碳掺杂的氧化物层以在氧化至少一部分碳掺杂的氧化物层以转化以产生氧化硅; 并湿法蚀刻氧化硅以基本上去除氧化硅。

公开(公告)号：US09709640B2

公开(公告)日：2017-07-18

申请号：US14840475

申请日：2015-08-31

Applicant: Ching-Ray Chang ,  Jen-Tzong Jeng ,  Jen-Hwa Hsu ,  Chih-Cheng Lu ,  Bor-Lin Lai ,  Van-Su Luong

Inventor： Ching-Ray Chang ,  Jen-Tzong Jeng ,  Jen-Hwa Hsu ,  Chih-Cheng Lu ,  Bor-Lin Lai ,  Van-Su Luong

IPC: G01R33/09 ,  G01R33/00 ,  G01D5/14

CPC classification number: G01R33/09 ,  G01D5/145 ,  G01R33/0011 ,  G01R33/0094

Abstract: A single bridge magnetic field sensor includes a fluxguide mounted to a surface of a substrate. A bridge unit includes first, second, third, and fourth magnetoresistive elements mounted around the fluxguide and mounted on the surface of the substrate. A switching circuit is electrically connected to two voltage inputs, two grounding terminals, two voltage output terminals, and the four magnetoresistive elements. The switching circuit can proceed with circuit switching according to a magnetic field in each axis direction to be measured, thereby changing electrical connection between the voltage inputs, the grounding terminals, the voltage output terminals, and the four magnetoresistive elements. A measuring unit is electrically connected to the two voltage output terminals and the four magnetoresistive elements. The magnetoresistances of the four magnetoresistive elements measured by the measuring unit and output voltages of the voltage output terminals can be used to obtain a magnetic field measurement result.

公开(公告)号：US20100188899A1

公开(公告)日：2010-07-29

申请号：US12758760

申请日：2010-04-12

Applicant: Cheng-Da Huang ,  Chih-Cheng Lu ,  Hsin Chen

Inventor： Cheng-Da Huang ,  Chih-Cheng Lu ,  Hsin Chen

IPC: G11C16/02 ,  G11C16/06

CPC classification number: G11C27/005 ,  G11C16/0441

Abstract: A nonvolatile analog memory has a floating gate point. The nonvolatile analog memory includes a capacitor. a first current source, a second current source and a current adjuster. The first current source controlled by a voltage value at the floating gate point and generates a first current. The second current source controlled by the voltage value at the floating gate point and generates a second current. The current adjuster receives the output voltage and a reference voltage and adjusts the first current and the second current based on the output voltage and the reference voltage. The current adjuster charges or discharges the capacitor to equalize the output voltage to the reference voltage.

Abstract translation: 非易失性模拟存储器具有浮动栅极点。 非易失性模拟存储器包括电容器。 第一电流源，第二电流源和电流调节器。 第一电流源由浮动栅极点处的电压值控制并产生第一电流。 第二电流源由浮动栅极点处的电压值控制并产生第二电流。 电流调节器接收输出电压和参考电压，并根据输出电压和参考电压调整第一电流和第二电流。 电流调节器对电容器充电或放电，以使输出电压与参考电压相等。

公开(公告)号：US07746693B2

公开(公告)日：2010-06-29

申请号：US12192137

申请日：2008-08-15

Applicant: Cheng-Da Huang ,  Chih-Cheng Lu ,  Hsin Chen

Inventor： Cheng-Da Huang ,  Chih-Cheng Lu ,  Hsin Chen

IPC: G11C16/04

CPC classification number: G11C27/005 ,  G11C16/0441

Abstract: A nonvolatile analog memory has a floating gate point. The nonvolatile analog memory includes a first current source, a second current source, and a current adjuster. The first current source generates a first current, and the second current source generates a second current. The current adjuster turns on or turns off a current path of the second current according to a reference current and the first current. Furthermore, when the current path of the second current is turned on, the first current is adjusted according to the second current, such that the first current is equal to the reference current.

Abstract translation: 非易失性模拟存储器具有浮动栅极点。 非易失性模拟存储器包括第一电流源，第二电流源和电流调节器。 第一电流源产生第一电流，第二电流源产生第二电流。 电流调节器根据参考电流和第一电流打开或关闭第二电流的电流路径。 此外，当第二电流的电流路径导通时，根据第二电流来调整第一电流，使得第一电流等于参考电流。

公开(公告)号：US20080146889A1

公开(公告)日：2008-06-19

申请号：US11637737

申请日：2006-12-13

Applicant: Shuenn-Tsong Young ,  Chung-Wang Lee ,  Chih-Cheng Lu ,  Tsair Kao ,  Woei-Chyn Chu

Inventor： Shuenn-Tsong Young ,  Chung-Wang Lee ,  Chih-Cheng Lu ,  Tsair Kao ,  Woei-Chyn Chu

IPC: A61B5/00

CPC classification number: A61B5/0205 ,  A61B5/02438 ,  A61B5/1117 ,  A61B5/1135

Abstract: In a method of monitoring human physiological parameters and safe condition universally, the method is applied to a monitoring apparatus worn at an examinee's body and includes the steps of: monitoring the examinee's current plurality of physiological parameters and plurality of movement information; analyzing the movement information to determine whether or not the examinee is in motion; analyzing the physiological parameters to determine whether or not each physiological parameter is in compliance with a normal physiological standard preinstalled in the monitoring apparatus if the examinee is determined not in motion, and also determining whether or not each physiological parameter is in compliance with a normal physiological standard preinstalled in the monitoring apparatus; and issuing a first precaution reporting signal to an identified recipient and sending out the first precaution reporting signal via a wireless transmission, if the physiological parameters are incompliance with the normal physiological standards.

Abstract translation: 在全面监测人体生理参数和安全状况的方法中，将该方法应用于佩戴在受检者体内的监测装置，其特征在于包括以下步骤：监测受检者当前的多个生理参数和多个运动信息; 分析运动信息以确定受检者是否运动; 分析生理参数，以确定每个生理参数是否符合预先安装在监测装置中的正常生理学标准，如果被检查者不被运动，并且还确定每个生理参数是否符合正常生理学 监测装置中预先安装标准; 以及如果所述生理参数不符合正常生理标准，则通过无线传输向所识别的接收方发出第一预警报告信号并发出所述第一预警报告信号。

公开(公告)号：US20080069169A1

公开(公告)日：2008-03-20

申请号：US11827003

申请日：2007-07-10

Applicant: Peidong Wang ,  Chih-Cheng Lu ,  Daryoosh Vakhshoori

Inventor： Peidong Wang ,  Chih-Cheng Lu ,  Daryoosh Vakhshoori

IPC: H01S5/00 ,  H01L29/06 ,  H01L33/00

CPC classification number: B82Y20/00 ,  H01S5/028 ,  H01S5/06255 ,  H01S5/101 ,  H01S5/1057 ,  H01S5/34 ,  H01S5/3413 ,  H01S2301/04

Abstract: Semiconductor substrate is disclosed having quantum wells having first bandgap, and quantum wells having second bandgap greater than first bandgap. Semiconductor structure is disclosed comprising substrate having quantum wells having given bandgap, other quantum wells modified to bandgap greater than given bandgap. Semiconductor substrate is disclosed comprising wafer having quantum wells, section of first bandgap, and section of second bandgap greater than first bandgap. Method for forming semiconductor substrate is provided, comprising providing wafer having given bandgap, depositing dielectric cap on portion and rapid thermal annealing to tuned bandgap greater than given bandgap. Semiconductor structure is disclosed comprising substrate having quantum wells modified by depositing cap and rapid thermal annealing to tuned bandgap greater than given bandgap. Method for forming semiconductor substrate is disclosed, comprising providing wafer having quantum wells having given bandgap, depositing cap on portion and rapid thermal annealing to tuned bandgap greater than given bandgap.

Abstract translation: 公开了具有量子阱具有第一带隙的半导体衬底，并且具有大于第一带隙的第二带隙的量子阱。 公开了半导体结构，其包括具有给定带隙的量子阱的衬底，其他量子阱被修改为具有大于给定带隙的带隙。 公开了半导体衬底，其包括具有量子阱的晶片，第一带隙的截面以及大于第一带隙的第二带隙的截面。 提供了形成半导体衬底的方法，其包括提供具有给定带隙的晶片，在部分上沉积介电帽和快速热退火至大于给定带隙的调谐带隙。 公开了半导体结构，其包括具有通过沉积帽和快速热退火而修改的量子阱的衬底，所述量子阱具有大于给定带隙的调谐带隙。 公开了一种用于形成半导体衬底的方法，其包括提供具有给定带隙的量子阱的晶片，将部分上的沉积帽和快速热退火至大于给定带隙的调谐带隙。

公开(公告)号：US07098116B2

公开(公告)日：2006-08-29

申请号：US10753816

申请日：2004-01-08

Applicant: Chih-Cheng Lu ,  Chuan-Ping Hou ,  Chu-Yun Fu ,  Chang Wen ,  Jang Syun Ming

Inventor： Chih-Cheng Lu ,  Chuan-Ping Hou ,  Chu-Yun Fu ,  Chang Wen ,  Jang Syun Ming

IPC: H01L21/76

CPC classification number: H01L21/02164 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/31116 ,  H01L21/31612 ,  H01L21/76229

Abstract: A method of reducing oxide thickness variations in a STI pattern that includes both a dense trench array and a wide trench is described. A first HDP CVD step with a deposition/sputter (D/S) ratio of 9.5 is used to deposit a dielectric layer with a thickness that is 120 to 130% of the shallow trench depth. An etch back is performed in the same CVD chamber with NF3, SiF4 or NF3 and SiF4 to remove about 40 to 50% of the initial dielectric layer. A second HDP CVD step with a D/S ratio of 16 deposits an additional thickness of dielectric layer to a level that is slightly higher than after the first deposition. The etch back and second deposition form a smoother dielectric layer surface which enables a subsequent planarization step to provide filled STI features with a minimal amount of dishing in wide trenches.

Abstract translation: 描述了一种降低包括密集沟槽阵列和宽沟槽的STI图案中的氧化物厚度变化的方法。 使用沉积/溅射（D / S）比为9.5的第一HDP CVD步骤沉积厚度为浅沟槽深度的120至130％的电介质层。 在具有NF 3，SiF 4或NF 3 Si和SiF 4的相同CVD室中进行回蚀刻， 以去除初始介电层的约40至50％。 D / S比为16的第二HDP CVD步骤将附加的电介质层的厚度沉积到稍高于第一次沉积后的水平。 回蚀刻和第二沉积形成较平滑的介电层表面，其使得随后的平坦化步骤能够在宽的沟槽中提供最少量的凹陷的填充的STI特征。

公开(公告)号：US07043292B2

公开(公告)日：2006-05-09

申请号：US10176944

申请日：2002-06-21

Applicant: Peter P. Tarjan ,  Chih-Cheng Lu ,  Walter Besio

Inventor： Peter P. Tarjan ,  Chih-Cheng Lu ,  Walter Besio

IPC: A61B5/402

CPC classification number: A61B8/483 ,  A61B5/0408 ,  A61B5/745 ,  A61B8/08 ,  A61B8/488

Abstract: The method of presenting concurrent information about the electrical and mechanical activity of the heart using non-invasively obtained electrical and mechanical cardiac activity data from the chest or thorax of a patient comprises the steps of: placing at least three active Laplacian ECG sensors at locations on the chest or thorax of the patient; where each sensor has at least one outer ring element and an inner solid circle element, placing at least one ultrasonic sensor on the thorax where there is no underlying bone structure, only tissue, and utilizing available ultrasound technology to produce two or three-dimensional displays of the moving surface of the heart and making direct measurements of the exact sites of the sensors on the chest surface to determine the position and distance from the center of each sensor to the heart along a line orthogonal to the plane of the sensor and create a virtual heart surface; updating the measurements at a rate to show the movement of the heart's surface; monitoring at each ultrasonic sensor site and each Laplacian ECG sensor site the position and movement of the heart and the passage of depolarization wave-fronts in the vicinity; treating those depolarization wave-fronts as moving dipoles at those sites to create images of their movement on the image of the beating heart's surface; and, displaying the heart's electrical activity on the dynamically changing image of the heart's surface with the goal to display an approximation of the activation sequence on the beating virtual surface of the heart

Abstract translation: 使用来自患者的胸部或胸部的非侵入式获得的电和机械心脏活动数据呈现关于心脏的电和机械活动的并发信息的方法包括以下步骤：将至少三个有源拉普拉斯ECG心电图传感器放置在 患者的胸部或胸部; 其中每个传感器具有至少一个外环元件和内部实心圆形元件，将至少一个超声波传感器放置在胸部上，其中没有下面的骨结构，仅包括组织，并且利用可用的超声技术来产生二维或三维显示 的心脏的移动表面，并直接测量胸部表面上传感器的精确位置，以确定沿着与传感器平面垂直的线的每个传感器的心脏到心脏的位置和距离，并创建一个 虚拟心脏表面; 以显示心脏表面运动的速率更新测量值; 在每个超声波传感器位置和每个拉普拉斯ECG点位置监测心脏的位置和运动以及去极化波前的附近; 将这些去极化波前作为移动偶极子处理，以在心跳表面上形成运动图像; 并且在心脏表面的动态变化的图像上显示心脏的电活动，目的是显示心跳的虚拟表面上的激活序列的近似值