Invention Grant
- Patent Title: Circuit device manufacturing method including mounting circuit elements on a conductive foil, forming separation grooves in the foil, and etching the rear of the foil
- Patent Title (中): 电路器件制造方法,包括将电路元件安装在导电箔上,在箔中形成分隔槽,并蚀刻箔的后部
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Application No.: US10724954Application Date: 2003-12-01
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Publication No.: US07105384B2Publication Date: 2006-09-12
- Inventor: Ryosuke Usui , Hideki Mizuhara , Yusuke Igarashi , Noriaki Sakamoto
- Applicant: Ryosuke Usui , Hideki Mizuhara , Yusuke Igarashi , Noriaki Sakamoto
- Applicant Address: JP Osaka JP Gunma
- Assignee: Sanyo Electric Co., Ltd,Kanto Sanyo Semiconductors Co., Ltd.
- Current Assignee: Sanyo Electric Co., Ltd,Kanto Sanyo Semiconductors Co., Ltd.
- Current Assignee Address: JP Osaka JP Gunma
- Agency: Fish & Richardson P.C.
- Priority: JPP.2002-352140 20021204
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/50

Abstract:
A circuit device manufacturing method is provided, wherein contaminants attached to the top surfaces of conductive patterns 21 are removed using plasma to thereby improve the adhesion of conductive patterns 21 to a sealing resin 28. By selective etching of a conductive foil 10, separation grooves 11 are formed, thereby forming conductive patterns 21. A semiconductor element 22A and other circuit elements are mounted onto desired locations of conductive patterns 21 and electrically connected with conductive patterns 21. By irradiating plasma onto conductive foil 10 from above, contaminants attached to the surfaces of separation grooves 11 are removed.
Public/Granted literature
- US20040152241A1 Circuit device manufacturing method Public/Granted day:2004-08-05
Information query
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