A well bias module outputs a voltage used to bias the wells of transistors or other semiconductor components. The well bias module includes a feedback loop having a voltage generation module and a subthreshold leakage sense module that is operable to model the transistors or other semiconductor components so as to sense the subthreshold leakage resulting from a particular well bias voltage output by the voltage generation module. The subthreshold leakage sense module provides a representation of the sensed subthreshold leakage to the voltage generation module, which adjusts the magnitude of the well bias voltage based on this representation so as to reduce or minimize the subthreshold leakage in the transistors or other semiconductor components.