发明授权
US07115501B2 Method for fabricating an integrated circuit device with through-plating elements and terminal units
有权
用于制造具有贯通电镀元件和端子单元的集成电路器件的方法
- 专利标题： Method for fabricating an integrated circuit device with through-plating elements and terminal units
- 专利标题（中）： 用于制造具有贯通电镀元件和端子单元的集成电路器件的方法
-
申请号： US10937903申请日： 2004-09-10
-
公开(公告)号： US07115501B2公开(公告)日： 2006-10-03
- 发明人: Uwe Kahler , Dirk Offenberg
- 申请人： Uwe Kahler , Dirk Offenberg
- 申请人地址： DE Munich
- 专利权人： Infineon Technologies AG
- 当前专利权人： Infineon Technologies AG
- 当前专利权人地址： DE Munich
- 代理机构： Morrison & Foerster LLP
- 优先权： DE10342547 20030912
- 主分类号： H01L21/4763
- IPC分类号： H01L21/4763
摘要：
A method for fabricating an integrated circuit device, an electrically conductive substrate being provided, an insulation layer being deposited on the substrate, the insulation layer being etched in structures, a contact-making layer being deposited on the patterned insulation layer and on the substrate in depressions which have first and second lateral dimensions, the contact-making layer being etched back in such a way that the contact-making layer is preserved in the structures with the depressions which have first lateral dimensions of the order of magnitude of the structure depth of the insulation layer and the contact-making layer is removed in the structures with depressions which have second lateral dimensions significantly greater than the structure depth of the insulation layer.