发明授权
US07133821B2 Read FIFO scheduling for multiple streams while maintaining coherency
有权
读取FIFO调度多个流,同时保持一致性
- 专利标题: Read FIFO scheduling for multiple streams while maintaining coherency
- 专利标题(中): 读取FIFO调度多个流,同时保持一致性
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申请号: US10302191申请日: 2002-11-22
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公开(公告)号: US07133821B2公开(公告)日: 2006-11-07
- 发明人: Manisha Agarwala , Maria B. H. Gill
- 申请人: Manisha Agarwala , Maria B. H. Gill
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Robert D. Marshall, Jr.; W. James Brady; Frederick J. Telecky, Jr.
- 主分类号: G06F17/50
- IPC分类号: G06F17/50 ; G06F9/455 ; G06F11/10
摘要:
A method of scheduling trace packets in an integrated circuit generating trace packets of plural types stores trace data in respective first-in-first-out buffers. If a timing trace data first-in-first-out buffer is empty, timing trace data packet is transmitted. If a program counter overall data first-in-first-out buffer is not empty and the processor is at a data interruptible boundary, a program counter data packet is transmitted. If data first-in-first-out buffer is not empty, a data packet is transmitted. The program counter data packets include program counter sync data, program counter exception data, program counter relative branch data and program counter absolute branch data.