- 专利标题: Prioritized bus request scheduling mechanism for processing devices
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申请号: US11095623申请日: 2004-05-11
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公开(公告)号: US07133981B2公开(公告)日: 2006-11-07
- 发明人: David L Hill , Derek T. Bachand
- 申请人: David L Hill , Derek T. Bachand
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Kenyon & Kenyon LLP
- 主分类号: G06F13/00
- IPC分类号: G06F13/00
摘要:
A scheduler stores data to be scheduled. The scheduler may include an array that identifies relative priorities among the queue entries according to a first priority scheme, such as by age. The scheduler also may include a priority register array identifying relative priorities among the queue entries according to a second priority scheme, such as by data type. A plurality of detectors coupled to the array and to the priority register array may determine which data is to be scheduled next.
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