发明授权
- 专利标题： Incremental routing in integrated circuit design
- 专利标题（中）： 集成电路设计中的增量路由
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申请号： US10624615申请日： 2003-07-21
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公开(公告)号： US07134112B1公开(公告)日： 2006-11-07
- 发明人: Jason H. Anderson , Vinay Verma , Sandor S. Kalman
- 申请人： Jason H. Anderson , Vinay Verma , Sandor S. Kalman
- 申请人地址： US CA San Jose
- 专利权人： Xilinx, Inc.
- 当前专利权人： Xilinx, Inc.
- 当前专利权人地址： US CA San Jose
- 代理商 H. C. Chan; Kim Kanzaki
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A method for completing the routing of a partially routed design is provided. The unrouted pins are routed to generate a first plurality of nets that may contain shorts or overlaps between the nets. The nets are analyzed to obtain timing information, and then divided into a set of critical and a set of non-critical nets. The non-critical nets are hidden, and the critical nets are rerouted to remove overlaps. The non-critical nets are then unhidden. The non-critical nets and rerouted critical nets are then rerouted so as to remove overlaps.
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