- 专利标题: SRAM cells having landing pad in contact with upper and lower cell gate patterns and methods of forming the same
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申请号: US11268138申请日: 2005-11-07
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公开(公告)号: US07135746B2公开(公告)日: 2006-11-14
- 发明人: Sung-Jin Kim , Soon-Moon Jung , Won-Seok Cho , Jae-Hoon Jang , Kun-Ho Kwak , Jong-Hyuk Kim , Jae-Joo Shim
- 申请人: Sung-Jin Kim , Soon-Moon Jung , Won-Seok Cho , Jae-Hoon Jang , Kun-Ho Kwak , Jong-Hyuk Kim , Jae-Joo Shim
- 申请人地址: KR Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: Myers Bigel Sibley & Sajovec
- 优先权: KR10-2004-0090608 20041108
- 主分类号: H01L29/76
- IPC分类号: H01L29/76 ; H01L29/94
摘要:
SRAM cells having landing pads in contact with upper and lower cell gate patterns, and methods of forming the same are provided. The SRAM cells and the methods remove the influence resulting from structural characteristics of the SRAM cells having vertically stacked upper and lower gate patterns, for stably connecting the patterns on the overall surface of the semiconductor substrate. An isolation layer isolating at least one lower active region is formed in a semiconductor substrate of the cell array region. The lower active region has two lower cell gate patterns. A body pattern is disposed in parallel with the semiconductor substrate. The body pattern is formed to confine an upper active region, which has upper cell gate patterns on the lower cell gate patterns. A landing pad is disposed between the lower cell gate patterns. A node pattern is formed to simultaneously contact the upper cell gate pattern and the lower cell gate pattern.
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