发明授权
- 专利标题: Apparatus and method to reduce undesirable effects caused by a fault in a memory device
-
申请号: US10902728申请日: 2004-07-29
-
公开(公告)号: US07142446B2公开(公告)日: 2006-11-28
- 发明人: Scott J. Derner , Stephen R. Porter , Scot M. Graham , Ethan A. Williford , Kevin G. Duesman
- 申请人: Scott J. Derner , Stephen R. Porter , Scot M. Graham , Ethan A. Williford , Kevin G. Duesman
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Jones Day
- 代理商 Edward L. Pencoske
- 主分类号: G11C11/24
- IPC分类号: G11C11/24
摘要:
A method and apparatus is provided for reducing the current in a memory device. Peripheral device control signals are translated to the wordline off voltage level, such as a negative wordline voltage. The translated signals prevent the peripheral devices from conducting current in the wordline off mode, even if a wordline-to-digitline short should occur. The control signals may include a column select signal for a column select device and an active pull-up signal for a sense amplifier, among others. Additionally, an equalization circuit having high and low resistance components is provided for the memory device. The equalization circuit limits current, even if a wordline-to-digitline short occurs.
公开/授权文献
信息查询