Invention Grant
US07145206B2 MOS field effect transistor with reduced parasitic substrate conduction
有权
MOS场效应晶体管减少寄生衬底导电
- Patent Title: MOS field effect transistor with reduced parasitic substrate conduction
- Patent Title (中): MOS场效应晶体管减少寄生衬底导电
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Application No.: US10938311Application Date: 2004-09-09
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Publication No.: US07145206B2Publication Date: 2006-12-05
- Inventor: Shekar Mallikarjunaswamy
- Applicant: Shekar Mallikarjunaswamy
- Applicant Address: US CA San Jose
- Assignee: Micrel, Inc.
- Current Assignee: Micrel, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patent Law Group LLP
- Agent Carmen C. Cook
- Main IPC: H01L29/72
- IPC: H01L29/72
Abstract:
A MOS field effect transistor includes an auxiliary diffusion formed in the drain region where the auxiliary diffusion has a conductivity type opposite to the drain region and is electrically shorted to the drain region. The auxiliary diffusion region forms a parasitic bipolar transistor having the effect of reducing substrate conduction caused by a forward biased drain to body junction.
Public/Granted literature
- US20050029582A1 MOS field effect transistor with reduced parasitic substrate conduction Public/Granted day:2005-02-10
Information query
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