发明授权
- 专利标题： Conductive bumps with non-conductive juxtaposed sidewalls
- 专利标题（中）： 具有非导电并置侧壁的导电凸块
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申请号： US10714277申请日： 2003-11-14
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公开(公告)号： US07154176B2公开(公告)日： 2006-12-26
- 发明人: Yuan-Chang Huang , Shyh-Ming Chang , Su-Chia Lu
- 申请人： Yuan-Chang Huang , Shyh-Ming Chang , Su-Chia Lu
- 申请人地址： TW Hsinchu
- 专利权人： Industrial Technology Research Institute
- 当前专利权人： Industrial Technology Research Institute
- 当前专利权人地址： TW Hsinchu
- 代理机构： Akin Gump Strauss Hauer & Feld, LLP
- 主分类号： H01L23/52
- IPC分类号： H01L23/52 ; H01L23/48
摘要：
A microelectronic structure having a substrate of multiple conductive bumps for contact with bond pads on an electronic substrate in the fabrication of a flip chip electronic assembly. Each of the conductive bumps includes a conductive layer which is absent from at least one sidewall of the bump to prevent the inadvertent formation of a short-circuiting electrical path between adjacent conductive bumps in the electronic assembly.
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