In a detection mode, a reverse bias voltage VM is applied to any one of scan lines K1–Km arranged in a light emitting display panel 1. The electrical potentials generated at respective data lines A1–An of this time are supplied to potential determination means J1–Jn. In the potential determination means J1–Jn, the electrical potentials generated at the respective data lines A1–An are supplied to switching elements Q31–Q3n via transfer switches Q11–Q1n. When the electrical potentials are the threshold voltages of the switching elements Q31–Q3n or greater, the outputs of comparators CP1–CPn are inverted, and the states of this time are latched in latch circuits LC1–LCn to be stored in a data register 11. By data stored in the data register 11, it is determined whether or not a defect has occurred in pixels of the display panel, and the location thereof is also determined.