Invention Grant
US07164154B2 Gate wiring layout for silicon-carbide-based junction field effect transistor
有权
基于碳化硅的结型场效应晶体管的栅极布线布局
- Patent Title: Gate wiring layout for silicon-carbide-based junction field effect transistor
- Patent Title (中): 基于碳化硅的结型场效应晶体管的栅极布线布局
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Application No.: US10995566Application Date: 2004-11-24
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Publication No.: US07164154B2Publication Date: 2007-01-16
- Inventor: Rajesh Kumar , Yuichi Takeuchi , Mitsuhiro Kataoka , Suhail Rashid Jeremy , Andrei Mihaila , Florin Udrea
- Applicant: Rajesh Kumar , Yuichi Takeuchi , Mitsuhiro Kataoka , Suhail Rashid Jeremy , Andrei Mihaila , Florin Udrea
- Applicant Address: JP Kariya
- Assignee: Denso Corporation
- Current Assignee: Denso Corporation
- Current Assignee Address: JP Kariya
- Agency: Posz Law Group, PLC
- Priority: JP2003-399931 20031128
- Main IPC: H01L29/15
- IPC: H01L29/15
Abstract:
A silicon carbide semiconductor device includes: a semiconductor substrate including first and second gate layers, a channel layer, a source layer, and a trench; a gate wiring having a first portion and a plurality of second portions; and a source wiring having a third portion and a plurality of fourth portions. The trench extends in a predetermined extending direction. The first portion connects to the first gate layer in the trench, and extends to the extending direction. The second portions protrude perpendicularly to be a comb shape. The third portion extends to the extending direction. The fourth portions protrude perpendicularly to be a comb shape, and electrically connect to the source layer. Each of the second portions connects to the second gate layer through a contact hole.
Public/Granted literature
- US20050145852A1 Silicon carbide semiconductor device Public/Granted day:2005-07-07
Information query
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