公开(公告)号：US20160351680A1

公开(公告)日：2016-12-01

申请号：US15114461

申请日：2014-10-06

Applicant: Akitaka SOENO ,  Yuichi TAKEUCHI ,  Narumasa SOEJIMA

Inventor： Akitaka SOENO ,  Yuichi TAKEUCHI ,  Narumasa SOEJIMA

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L29/739 ,  H01L29/10 ,  H01L29/16

CPC classification number: H01L29/66068 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7813

Abstract: A method is provided for manufacturing an insulated gate type switching device. The method includes: implanting second conductivity type impurities into a surface of a semiconductor substrate so as to form a second region of a second conductivity type in the surface; forming a third region of the second conductivity type having a second conductivity type impurity density lower than the second region on the surface by epitaxial growth: and forming a trench gate electrode.

Abstract translation: 提供一种用于制造绝缘栅型开关装置的方法。 该方法包括：将第二导电型杂质注入到半导体衬底的表面中，以在表面上形成第二导电类型的第二区域; 通过外延生长形成具有比表面上的第二区域低的第二导电类型杂质密度的第二导电类型的第三区域;以及形成沟槽栅电极。

公开(公告)号：US07582932B2

公开(公告)日：2009-09-01

申请号：US11268771

申请日：2005-11-08

Applicant: Malhan Rajesh Kumar ,  Yuichi Takeuchi

Inventor： Malhan Rajesh Kumar ,  Yuichi Takeuchi

IPC: H01L31/0312

CPC classification number: H01L29/7828 ,  H01L29/1608 ,  H01L29/66666 ,  H01L29/7391 ,  H01L29/7397 ,  Y10S438/931

Abstract: A silicon carbide semiconductor device includes: a semiconductor substrate having a silicon carbide substrate, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer; a trench penetrating the second and the third semiconductor layers to reach the first semiconductor layer; a channel layer on a sidewall and a bottom of the trench; an oxide film on the channel layer; a gate electrode on the oxide film; a first electrode connecting to the third semiconductor layer; and a second electrode connecting to the silicon carbide substrate. A position of a boundary between the first semiconductor layer and the second semiconductor layer is disposed lower than an utmost lowest position of the oxide film.

Abstract translation: 碳化硅半导体器件包括：具有碳化硅衬底，第一半导体层，第二半导体层和第三半导体层的半导体衬底; 穿过第二和第三半导体层的沟槽到达第一半导体层; 在沟槽的侧壁和底部上的沟道层; 沟道层上的氧化膜; 氧化膜上的栅电极; 连接到第三半导体层的第一电极; 以及连接到碳化硅衬底的第二电极。 第一半导体层和第二半导体层之间的边界的位置被设置为低于氧化膜的最低位置。

公开(公告)号：US07141498B2

公开(公告)日：2006-11-28

申请号：US11159264

申请日：2005-06-23

Applicant: Rajesh Kumar Malhan ,  Yuichi Takeuchi ,  Irina Nikitina ,  Konstantin Vassilevski ,  Nicholas Wright ,  Alton Horsfall

Inventor： Rajesh Kumar Malhan ,  Yuichi Takeuchi ,  Irina Nikitina ,  Konstantin Vassilevski ,  Nicholas Wright ,  Alton Horsfall

IPC: H01L21/44

CPC classification number: H01L29/7802 ,  H01L21/0485 ,  H01L29/41766 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7395

Abstract: A method of forming an ohmic contact on a substrate composed of a wide-band gap semiconductor material includes: depositing a transition metal group metal on the substrate; annealing the substrate at a high temperature to cause a solid state chemical reaction between the substrate and the deposited metal that forms a modified layer in the substrate having modified properties different than the substrate, and by-products composed of a silicide and a nanocrystalline graphite layer; selectively etching the substrate to remove one or more of the by-products of the solid state chemical reaction from a surface of the substrate; and depositing a metal film composed of a transition group metal over the modified layer on the substrate to form the ohmic contact. The modified layer permits formation of the ohmic contact without high temperature annealing after depositing the metal film.

公开(公告)号：US20060070696A1

公开(公告)日：2006-04-06

申请号：US11232887

申请日：2005-09-23

Applicant: Yuichi Takeuchi ,  Naoki Sugiyama

Inventor： Yuichi Takeuchi ,  Naoki Sugiyama

IPC: B29D30/32

CPC classification number: B29D30/32 ,  B29D30/244 ,  B29D2030/3264

Abstract: The method for molding a bead portion for a green tire includes a bead core supporting step for supporting the bead core through a carcass ply upon expanding a diameter of a bead core supporter including a seating surface for supporting a radially inner surface of the bead core. Since the bead core supporter comprises an outer piece outside of the seating surface in a tire axial direction that rises up towards outside in the radial direction with a clearance between the same and the bead core, that is larger than the thickness of the carcass ply, it is possible to flip a carcass outer region up, that is outside in the tire axial direction than a sandwiched region of the carcass ply, sandwiched and held between the seating surface and the bead core, and to deform the carcass outer region into an outer inclined piece that is inclined and extended towards radially outside without including any partially bent portions. It further includes a curving step of pressing the outer inclined piece inward in the tire axial direction by using a ply winding ring for curving the same towards the outside surface and the radially outer surface of the bead core, and a pressing step of pressing a tip end portion of the curved outer inclined piece towards the radially outer surface of the bead core by using a pressing roller.

公开(公告)号：US20050145852A1

公开(公告)日：2005-07-07

申请号：US10995566

申请日：2004-11-24

Applicant: Rajesh Kumar ,  Yuichi Takeuchi ,  Mitsuhiro Kataoka ,  Suhail Jeremy ,  Andrei Mihaila ,  Florin Udrea

Inventor： Rajesh Kumar ,  Yuichi Takeuchi ,  Mitsuhiro Kataoka ,  Suhail Jeremy ,  Andrei Mihaila ,  Florin Udrea

IPC: H01L29/80 ,  H01L21/337 ,  H01L29/24 ,  H01L29/808 ,  H01L29/15

CPC classification number: H01L29/8083 ,  H01L29/1608

Abstract: A silicon carbide semiconductor device includes: a semiconductor substrate including first and second gate layers, a channel layer, a source layer, and a trench; a gate wiring having a first portion and a plurality of second portions; and a source wiring having a third portion and a plurality of fourth portions. The trench extends in a predetermined extending direction. The first portion connects to the first gate layer in the trench, and extends to the extending direction. The second portions protrude perpendicularly to be a comb shape. The third portion extends to the extending direction. The fourth portions protrude perpendicularly to be a comb shape, and electrically connect to the source layer. Each of the second portions connects to the second gate layer through a contact hole.

Abstract translation: 碳化硅半导体器件包括：包括第一和第二栅极层，沟道层，源极层和沟槽的半导体衬底; 栅极布线，具有第一部分和多个第二部分; 以及具有第三部分和多个第四部分的源极布线。 沟槽沿预定的延伸方向延伸。 第一部分连接到沟槽中的第一栅极层，并延伸到延伸方向。 第二部分垂直突出成为梳形。 第三部分延伸到延伸方向。 第四部分垂直突出成梳状，并且电连接到源层。 每个第二部分通过接触孔连接到第二栅极层。

公开(公告)号：US6057558A

公开(公告)日：2000-05-02

申请号：US34344

申请日：1998-03-04

Applicant: Tsuyoshi Yamamoto ,  Rajesh Kumar ,  Kunihiko Hara ,  Yuichi Takeuchi ,  Kazukuni Hara ,  Masami Naito

Inventor： Tsuyoshi Yamamoto ,  Rajesh Kumar ,  Kunihiko Hara ,  Yuichi Takeuchi ,  Kazukuni Hara ,  Masami Naito

IPC: H01L21/04 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/24 ,  H01L29/423 ,  H01L29/78 ,  H01L31/0312

CPC classification number: H01L29/0847 ,  H01L29/0626 ,  H01L29/42368 ,  H01L29/66068 ,  H01L29/66666 ,  H01L29/7828 ,  H01L29/045 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/4238

Abstract: In a silicon carbide semiconductor device such as a trench gate type power MOSFET, the film thickness and the impurity concentration of a thin film silicon carbide semiconductor layer formed on a trench side face to constitute an accumulation-type channel-forming region and enable the device to operate with a low gate voltage, low on-resistance and low power loss are set so that on impression of a reverse bias voltage a pn junction between a P-type epitaxial layer and an n.sup.- -type epitaxial layer undergoes avalanche breakdown before the thin film silicon carbide semiconductor layer undergoes punch-through. By this means it is possible to obtain a target high source-drain withstand voltage.

Abstract translation: 在诸如沟槽栅型功率MOSFET的碳化硅半导体器件中，形成在沟槽侧面上的薄膜碳化硅半导体层的膜厚度和杂质浓度构成积聚型沟道形成区域，并使器件 以低栅极电压操作，设置低导通电阻和低功率损耗，使得在反向偏置电压的印象上，P型外延层和n型外延层之间的pn结在其之前经历雪崩击穿 薄膜碳化硅半导体层进行穿通。 通过这种方式，可以获得目标高的源极 - 漏极耐受电压。

公开(公告)号：US6054752A

公开(公告)日：2000-04-25

申请号：US107507

申请日：1998-06-30

Applicant: Kazukuni Hara ,  Yuichi Takeuchi ,  Tsuyoshi Yamamoto ,  Rajesh Kumar ,  Mitsuhiro Kataoka

Inventor： Kazukuni Hara ,  Yuichi Takeuchi ,  Tsuyoshi Yamamoto ,  Rajesh Kumar ,  Mitsuhiro Kataoka

IPC: H01L21/04 ,  H01L29/06 ,  H01L29/24 ,  H01L29/78 ,  H01L29/34 ,  H01L29/40

CPC classification number: H01L29/7813 ,  H01L29/0611 ,  H01L29/0638 ,  H01L29/66068 ,  H01L29/7802 ,  H01L29/1608

Abstract: A semiconductor device comprises a semiconductor substrate including a first conductivity type first semiconductor layer and a second conductivity type second semiconductor layer formed on the first semiconductor layer. A unit cell for controlling current flowing between a source electrode and a drain electrode is formed in the semiconductor substrate. A trench is formed in a peripheral region of the unit cell to form mesa structure. A field relaxing layer is formed between an insulating film on a side face of the second trench and both the first semiconductor layer and the second semiconductor layer in order to relax concentration of an electric field in the insulating film.

Abstract translation: 半导体器件包括：半导体衬底，包括形成在第一半导体层上的第一导电型第一半导体层和第二导电型第二半导体层。 在半导体衬底中形成用于控制在源电极和漏电极之间流动的电流的单元。 在单电池的周边区域形成沟槽，形成台面结构。 在第二沟槽的侧面上的绝缘膜与第一半导体层和第二半导体层之间形成场弛豫层，以使绝缘膜中的电场的集中化。

公开(公告)号：US08901573B2

公开(公告)日：2014-12-02

申请号：US14129998

申请日：2012-08-08

Applicant: Yuichi Takeuchi ,  Naohiro Suzuki

Inventor： Yuichi Takeuchi ,  Naohiro Suzuki

IPC: H01L29/15 ,  H01L21/336 ,  H01L21/265 ,  H01L29/78 ,  H01L27/098 ,  H01L29/66 ,  H01L29/06 ,  H01L29/16 ,  H01L21/04 ,  H01L29/808 ,  H01L29/10

CPC classification number: H01L21/265 ,  H01L21/0465 ,  H01L27/098 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/0638 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1025 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66909 ,  H01L29/78 ,  H01L29/8083

Abstract: A semiconductor device includes a silicon carbide semiconductor substrate, a transistor formed in a cell region of the semiconductor substrate, and a voltage-breakdown-resistant structure formed in a region which surrounds an outer periphery of the cell region. The semiconductor substrate includes a first conductivity type substrate, a first conductivity type drift layer on the first conductivity type substrate, a second conductivity type layer on the drift layer, and a first conductivity type layer on the second conductivity type layer. The voltage-breakdown-resistant structure includes a first recess which surrounds the outer periphery of the cell region and reaches the drift layer, a trench located at a side surface of the recess on an inner periphery of the recess, and a second conductivity type buried layer buried in the trench to provide the side surface of the first recess.

Abstract translation: 半导体器件包括碳化硅半导体衬底，形成在半导体衬底的单元区域中的晶体管，以及形成在围绕电池区域的外周的区域中的耐电压击穿结构。 半导体衬底包括第一导电类型衬底，第一导电类型衬底上的第一导电类型漂移层，漂移层上的第二导电类型层和第二导电类型层上的第一导电类型层。 耐电压结构包括围绕电池区域的外周并到达漂移层的第一凹部，位于凹部的内周上的凹部的侧表面处的沟槽，以及第二导电类型埋置 埋置在沟槽中以提供第一凹部的侧表面。

公开(公告)号：US20140145212A1

公开(公告)日：2014-05-29

申请号：US14129998

申请日：2012-08-08

Applicant: Yuichi Takeuchi ,  Naohiro Suzuki

Inventor： Yuichi Takeuchi ,  Naohiro Suzuki

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/265

CPC classification number: H01L21/265 ,  H01L21/0465 ,  H01L27/098 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/0638 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1025 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66909 ,  H01L29/78 ,  H01L29/8083

Abstract: A semiconductor device includes a silicon carbide semiconductor substrate, a transistor formed in a cell region of the semiconductor substrate, and a voltage-breakdown-resistant structure formed in a region which surrounds an outer periphery of the cell region. The semiconductor substrate includes a first conductivity type substrate, a first conductivity type drift layer on the first conductivity type substrate, a second conductivity type layer on the drift layer, and a first conductivity type layer on the second conductivity type layer. The voltage-breakdown-resistant structure includes a first recess which surrounds the outer periphery of the cell region and reaches the drift layer, a trench located at a side surface of the recess on an inner periphery of the recess, and a second conductivity type buried layer buried in the trench to provide the side surface of the first recess.

Abstract translation: 半导体器件包括碳化硅半导体衬底，形成在半导体衬底的单元区域中的晶体管，以及形成在围绕电池区域的外周的区域中的耐电压击穿结构。 半导体衬底包括第一导电类型衬底，第一导电类型衬底上的第一导电类型漂移层，漂移层上的第二导电类型层和第二导电类型层上的第一导电类型层。 耐电压结构包括围绕电池区域的外周并到达漂移层的第一凹部，位于凹部的内周上的凹部的侧表面处的沟槽，以及第二导电类型埋置 埋置在沟槽中以提供第一凹部的侧表面。

公开(公告)号：US08252135B2

公开(公告)日：2012-08-28

申请号：US12674316

申请日：2008-09-17

Applicant: Yuichi Takeuchi ,  Yoshitomo Nagata ,  Kazuhiko Moriya ,  Yoko Toda ,  Nobuo Tan

Inventor： Yuichi Takeuchi ,  Yoshitomo Nagata ,  Kazuhiko Moriya ,  Yoko Toda ,  Nobuo Tan

IPC: B32B37/00

CPC classification number: B44C1/175 ,  B44C3/00 ,  Y10T428/24802

Abstract: A decorative molded article which is obtained by transferring hydraulically a hydraulic transfer film comprising a transfer layer including at least two layers of a curable resin layer with an active energy ray and a printed design layer such that the curable resin layer with an ionization radiation becomes a surface layer, wherein the printed design layer comprises a layer printed with a design to be raised which is obtained by using an ink containing an inorganic pigment having a degree of swelling of 200% or more, and the surface of the transfer layer has the raised design corresponding to the design of the layer printed with a design to be raised; and a method for producing a decorative molded article having a raised portion, after a hydraulic transfer film is activated and transferred onto a product to be transferred, the hydraulic transfer film includes a support film, and a printed design layer having a curable resin layer and a layer printed with a design to be raised, which is obtained by using an ink containing an inorganic pigment having a degree of swelling of 200% or more, and the printed design layer does not include a solid print layer obtained by using an ink containing an inorganic pigment having a degree of swelling of 200% or more; the curable resin layer is semi-cured; the support film is removed from the transfer layer, the transfer layer is dried, and the curable resin layer is completely cured.

Abstract translation: 一种装饰成型品，其通过水力转印包含具有至少两层可固化树脂层的转印层和活性能量射线和印刷图案层的液压转印膜，使得具有电离辐射的固化性树脂层变为 表面层，其中所述印刷图案层包括通过使用含有膨胀度为200％以上的无机颜料的油墨而获得的待升高设计的层，并且所述转印层的表面具有凸起 设计对应于印刷设计的图案设计; 以及制造具有凸起部分的装饰成型品的方法，在液压转印膜被活化并转移到待转印的产品上之后，水转印膜包括支撑膜和具有可固化树脂层的印刷设计层和 通过使用含有膨润度为200％以上的无机颜料的油墨而印刷的要设置的层叠层，印刷图案层不包含通过使用含有 具有200％以上的膨润度的无机颜料; 固化树脂层半固化; 从转印层除去支撑膜，干燥转印层，使固化性树脂层完全固化。