发明授权
- 专利标题: Method of fabricating semiconductor device
- 专利标题(中): 制造半导体器件的方法
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申请号: US11092900申请日: 2005-03-30
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公开(公告)号: US07176080B2公开(公告)日: 2007-02-13
- 发明人: Itaru Kawabata , Hirofumi Inoue
- 申请人: Itaru Kawabata , Hirofumi Inoue
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
- 优先权: JP2004-107153 20040331
- 主分类号: H01L21/8234
- IPC分类号: H01L21/8234 ; H01L21/8244
摘要:
A method of fabricating a semiconductor device includes forming trenches in active areas respectively, the trenches having sidewalls and upper openings respectively, forming first conductive regions in the trenches so that the first conductive regions serve as electrodes of the trench capacitors, respectively, each first conductive region including first impurity of a predetermined conductive type, forming sidewall insulating films on the sidewalls located over the first conductive regions respectively, forming second conductive regions inside the sidewall insulating films respectively, removing the sidewall insulating film located above the second conductive regions respectively, doping regions of the substrate located under the gate electrodes with second impurity of a reverse conduction type relative to the first impurity in the second direction from the upper openings through portions of the trenches from which the sidewall insulating films have been removed respectively, and forming third conductive regions in the portions of the trenches.
公开/授权文献
- US20050218441A1 Semiconductor device and method of fabricating the same 公开/授权日:2005-10-06
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