Invention Grant
US07184338B2 Semiconductor device, semiconductor device testing method, and programming method
有权
半导体器件,半导体器件测试方法和编程方法
- Patent Title: Semiconductor device, semiconductor device testing method, and programming method
- Patent Title (中): 半导体器件,半导体器件测试方法和编程方法
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Application No.: US11215253Application Date: 2005-08-30
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Publication No.: US07184338B2Publication Date: 2007-02-27
- Inventor: Harunobu Nakagawa , Minoru Aoki , Shigekazu Yamada
- Applicant: Harunobu Nakagawa , Minoru Aoki , Shigekazu Yamada
- Applicant Address: US CA Sunnyvale
- Assignee: Spansion LLC
- Current Assignee: Spansion LLC
- Current Assignee Address: US CA Sunnyvale
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C29/00

Abstract:
A semiconductor device includes: a latch circuit that latches a given signal in a test mode; and a generating circuit that generates a signal that defines a program voltage used for programming of a memory cell in accordance with the signal latched in the latch circuit. The generating circuit includes: a circuit that generates the signal that defines an initial voltage of the program voltage; a circuit that generates the signal that defines a pulse width of the program voltage; and a circuit that generates the signal that defines a step width of the program voltage when the program voltage is a voltage that increases stepwise.
Public/Granted literature
- US20060077736A1 Semiconductor device, semiconductor device testing method, and programming method Public/Granted day:2006-04-13
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