Invention Grant
US07186662B2 Method for forming a hard mask for gate electrode patterning and corresponding device
有权
用于形成用于栅极电极图案化的硬掩模和相应装置的方法
- Patent Title: Method for forming a hard mask for gate electrode patterning and corresponding device
- Patent Title (中): 用于形成用于栅极电极图案化的硬掩模和相应装置的方法
-
Application No.: US10964841Application Date: 2004-10-13
-
Publication No.: US07186662B2Publication Date: 2007-03-06
- Inventor: Chien-Hao Chen , Chia-Jen Chen , Tze-Liang Lee , Chao-Cheng Chen , Shih-Chang Chen
- Applicant: Chien-Hao Chen , Chia-Jen Chen , Tze-Liang Lee , Chao-Cheng Chen , Shih-Chang Chen
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/461
- IPC: H01L21/461
Abstract:
A method for forming a hard mask for gate electrode patterning in a semiconductor device is disclosed. The method includes providing a polysilicon layer to be etched and forming over the polysilicon layer, a nitride hardmask with a relatively high etch rate to hydrofluoric acid, as compared to the etch rate of silicon oxide. The polysilicon can then be patterned using the hardmask and the hardmask can be removed using hydrofluoric acid.
Public/Granted literature
- US20060081917A1 Method for forming a hard mask for gate electrode patterning and corresponding device Public/Granted day:2006-04-20
Information query
IPC分类:
