A frequency synthesizer includes: a phase detector, a loop filter, a controllable oscillator, a frequency divider, and a sigma-delta modulator for providing the division factor according to an integral part and a fractional part. The sigma-delta modulator includes a controller for providing a first digital value, a second digital value and a third digital value; a first adder for combining the second digital value, the third digital value, and a digital feedback value to generate a combination result; a quantizer for quantizing the combination result to generate a quantization value; a second adder for combining the first digital value and the quantization value to generate the division factor; and a multiplier for multiplying the quantization value by a constant multiplication factor; wherein the controller adjusts the third digital value in response to the reference signal for making an output frequency resolution substantially fixed.