Invention Grant
- Patent Title: High-efficiency error detection and/or correction code
- Patent Title (中): 高效率错误检测和/或校正码
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Application No.: US10264273Application Date: 2002-10-03
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Publication No.: US07188294B2Publication Date: 2007-03-06
- Inventor: Laurent Murillo
- Applicant: Laurent Murillo
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics S.A.
- Current Assignee: STMicroelectronics S.A.
- Current Assignee Address: FR Montrouge
- Agency: Wolf, Greenfield & Sacks, P.C.
- Agent Lisa K. Jorgenson; William R. McClellan
- Priority: FR0112863 20011005
- Main IPC: H03M13/00
- IPC: H03M13/00 ; G06F11/00
Abstract:
A method for determining r error detection bits of a word of m bits to be coded, including the step of calculating the product of a vector with m components representative of the word of m bits to be coded and of a parity control matrix. The parity control matrix includes at least two consecutive complementary columns. The present invention also relates to a method for determining a syndrome, as well as a coding and decoding circuit.
Public/Granted literature
- US20030070130A1 High-efficiency error detection and/or correction code Public/Granted day:2003-04-10
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