发明授权
US07193433B1 Programmable logic block having lookup table with partial output signal driving carry multiplexer
有权
具有具有部分输出信号驱动进位多路复用器的查找表的可编程逻辑块
- 专利标题: Programmable logic block having lookup table with partial output signal driving carry multiplexer
- 专利标题(中): 具有具有部分输出信号驱动进位多路复用器的查找表的可编程逻辑块
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申请号: US11151988申请日: 2005-06-14
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公开(公告)号: US07193433B1公开(公告)日: 2007-03-20
- 发明人: Steven P. Young
- 申请人: Steven P. Young
- 申请人地址: US CA San Jose
- 专利权人: Xilinx, Inc.
- 当前专利权人: Xilinx, Inc.
- 当前专利权人地址: US CA San Jose
- 代理商 Lois D. Cartier
- 主分类号: H03K19/173
- IPC分类号: H03K19/173 ; H03K19/177
摘要:
A programmable logic block provides to a carry chain multiplexer an output signal representing a partial output signal from a programmable lookup table (LUT), e.g., an output signal having a value that depends upon fewer than all of the data input signals of the LUT. In one embodiment, a first LUT output terminal provides a signal that depends upon fewer than all of the LUT data input signals, and the second LUT output terminal provides a signal that depends upon all of the LUT data input signals. In another embodiment, the first output signal depends upon X of the input signals and the second output signal depends upon Y of the input signals, X and Y being positive integers, X being less than Y. The first LUT output terminal drives a data input terminal, and the second LUT output terminal drives a select input terminal, of the carry chain multiplexer.
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