发明授权
- 专利标题: Modeling a logic design
- 专利标题(中): 建模逻辑设计
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申请号: US10054179申请日: 2002-01-17
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公开(公告)号: US07197724B2公开(公告)日: 2007-03-27
- 发明人: William R. Wheeler , Timothy J. Fennell
- 申请人: William R. Wheeler , Timothy J. Fennell
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Fish & Richardson P.C.
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
Modeling a logic design includes displaying a menu comprised of different types of functional block diagrams, receiving an input selecting one of the different types of functional block diagrams, retrieving a selected functional block diagram, and creating a graphical representation of a logic design using the selected functional block diagram. The graphical representation is created by interconnecting the selected functional block diagram with one or more other functional block diagrams to generate a model of a logic design and defining the selected functional block diagram using simulation code if the functional block diagram is undefined when retrieved.
公开/授权文献
- US20030135355A1 Modeling a logic design 公开/授权日:2003-07-17
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