Invention Grant
- Patent Title: Frequency selection using capacitance multiplication
- Patent Title (中): 频率选择使用电容倍增
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Application No.: US10990368Application Date: 2004-11-18
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Publication No.: US07199651B2Publication Date: 2007-04-03
- Inventor: Kouros Azimi , Thaddeus John Gabara
- Applicant: Kouros Azimi , Thaddeus John Gabara
- Applicant Address: US PA Allentown
- Assignee: Agere Systems Inc.
- Current Assignee: Agere Systems Inc.
- Current Assignee Address: US PA Allentown
- Main IPC: H03B1/00
- IPC: H03B1/00
Abstract:
A variable capacitance circuit on an integrated circuit comprises a MOS transistor, and a capacitance multiplier connected to one end of a channel of the MOS device. A MOS device is formed in series with an inductance, and a capacitance multiplier is formed to be connected to a node between the MOS device and the inductance.
Public/Granted literature
- US20060103456A1 Frequency selection using capacitance multiplication Public/Granted day:2006-05-18
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