发明授权
- 专利标题: Continuous-time-sigma-delta DAC using chopper stabalization
- 专利标题(中): 使用斩波稳定的连续时间 - Σ-ΔDAC
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申请号: US11228114申请日: 2005-09-16
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公开(公告)号: US07205920B2公开(公告)日: 2007-04-17
- 发明人: Paul John Morrow , Maria del Mar Chamarro Marti , Colin G. Lyden , Mike Dominic Keane , Robert W. Adams , Richard Thomas O'Brien , Paschal Thomas Minogue , Hans Johan Olaf Mansson , Atsushi Matamura , Andrew Abo
- 申请人: Paul John Morrow , Maria del Mar Chamarro Marti , Colin G. Lyden , Mike Dominic Keane , Robert W. Adams , Richard Thomas O'Brien , Paschal Thomas Minogue , Hans Johan Olaf Mansson , Atsushi Matamura , Andrew Abo
- 申请人地址: US MA Norwood
- 专利权人: Analog Devices, Inc.
- 当前专利权人: Analog Devices, Inc.
- 当前专利权人地址: US MA Norwood
- 代理机构: Wolf, Greenfield & Sacks, P.C.
- 主分类号: H03M1/66
- IPC分类号: H03M1/66
摘要:
A sigma-delta digital-to-analog converter comprises a current digital-to-analog converter (IDAC) stage which generates a current depending on an input digital signal. An output current-to-voltage converter converts the generated signal to a voltage on a continuous-time basis. The amplifier used in the output current-to-voltage converter is chopper-stabilized. The converter can be single bit or multi-bit. The IDAC stage can be implemented with a pair of branches, a first branch comprising a first biasing current source and a second branch comprising a second biasing current source. The biasing current sources can be chopper-stabilized by connecting the bias current sources to the output current-to-voltage converter by a set of switches. The switches connect the biasing current sources to the output current-to-voltage converter in a first configuration and a second, reversed, configuration. This modulates flicker noise contributed by the bias current sources to the chopping frequency. from where it can be removed by filtering downstream of the current-to-voltage converter.
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