Invention Grant
- Patent Title: Integrated circuit metal silicide method
- Patent Title (中): 集成电路金属硅化物法
-
Application No.: US11073982Application Date: 2005-03-07
-
Publication No.: US07208409B2Publication Date: 2007-04-24
- Inventor: Jiong-Ping Lu , Duofeng Yue , Xiaozhan Liu , Donald S. Miles , Lance S. Robertson
- Applicant: Jiong-Ping Lu , Duofeng Yue , Xiaozhan Liu , Donald S. Miles , Lance S. Robertson
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Peter K. McLarty; W. James Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/336 ; H01L21/8234
Abstract:
Fluorine containing regions (70) are formed in the source and drain regions (60) of the MOS transistor. A metal layer (90) is formed over the fluorine containing regions (70) and the source and drain regions (60). The metal layer is reacted with the underlying fluorine containing regions to form a metal silicide.
Public/Granted literature
- US20050208764A1 Integrated circuit metal silicide method Public/Granted day:2005-09-22
Information query
IPC分类:
