发明授权
US07216219B2 Method and apparatus for avoiding write-after-read hazards in an execute-ahead processor
有权
用于在执行前处理器中避免读取后读数危险的方法和装置
- 专利标题: Method and apparatus for avoiding write-after-read hazards in an execute-ahead processor
- 专利标题(中): 用于在执行前处理器中避免读取后读数危险的方法和装置
-
申请号: US10923218申请日: 2004-08-20
-
公开(公告)号: US07216219B2公开(公告)日: 2007-05-08
- 发明人: Shailender Chaudhry , Paul Caprioli , Marc Tremblay
- 申请人: Shailender Chaudhry , Paul Caprioli , Marc Tremblay
- 申请人地址: US CA Santa Clara
- 专利权人: Sun Microsystems Inc.
- 当前专利权人: Sun Microsystems Inc.
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Park, Vaughan & Fleming, LLP
- 主分类号: G06F9/30
- IPC分类号: G06F9/30
摘要:
One embodiment of the present invention provides a system that avoids write-after-read (WAR) hazards while speculatively executing instructions on a processor. The system starts in a normal execution mode, wherein the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint, defers the instruction, and executes subsequent instructions in an execute-ahead mode, wherein instructions that cannot be executed because of unresolved data dependencies are deferred, and wherein other non-deferred instructions are executed in program order. While deferring the instruction, the system stores the instruction along with any resolved source operands for the instruction into a deferred buffer.
公开/授权文献
信息查询