发明授权
- 专利标题: Integrated circuit device having clock signal output circuit
- 专利标题(中): 具有时钟信号输出电路的集成电路器件
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申请号: US11075882申请日: 2005-03-10
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公开(公告)号: US07221206B2公开(公告)日: 2007-05-22
- 发明人: Katsutoyo Misawa , Yasuyuki Ishikawa , Akira Suzuki , Yoshinori Teshima , Hideaki Ishihara
- 申请人: Katsutoyo Misawa , Yasuyuki Ishikawa , Akira Suzuki , Yoshinori Teshima , Hideaki Ishihara
- 申请人地址: JP Kariya
- 专利权人: Denso Corporation
- 当前专利权人: Denso Corporation
- 当前专利权人地址: JP Kariya
- 代理机构: Posz Law Group, PLC
- 优先权: JP2004-078247 20040318; JP2004-082580 20040322
- 主分类号: G06F1/04
- IPC分类号: G06F1/04
摘要:
Integrated circuit device includes: a wiring; a clock signal output circuit including a ring oscillator; an internal circuit; an internal power supply generation circuit for supplying an electric power to the clock signal output circuit and to the internal circuit on the basis of a power supplied from an external circuit; and a capacitor connection terminal. The internal power supply generation circuit supplies the electric power to the ring oscillator through the wiring connecting between the internal power supply generation circuit and the capacitor connection terminal. The internal power supply generation circuit supplies the electric power to the internal circuit through the wiring connecting to the capacitor connection terminal.
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