发明授权
US07222064B1 Instruction processor emulation having inter-processor messaging accounting 有权
指令处理器仿真具有处理器间消息记帐

Instruction processor emulation having inter-processor messaging accounting
摘要:
Techniques are described for emulating inter-processor communications between multiple instruction processors. The techniques provide inter-processor message accounting and error detection. A system, for example, includes software executing within an emulation environment provided by a computing system. The emulation software emulates an instruction processor having an interface to receive inter-processor messages. During emulation the emulated instruction processor calculates an actual count of the inter-processor messages received during emulation. A compiler executing on the computing system compiles test software to output an instruction stream for execution by the emulated instruction processor. The compiler calculates an expected count of inter-processor messages that the emulated instruction processor is expected to receive during emulation. Emulation control software executing on the computing system generates a report that presents the expected count of the inter-processor messages and the actual count of the inter-processor messages.
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