发明授权
- 专利标题: Method of manufacturing
- 专利标题(中): 制造方法
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申请号: US10330015申请日: 2002-12-27
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公开(公告)号: US07226817B2公开(公告)日: 2007-06-05
- 发明人: Yoshifumi Tanada , Atsuo Isobe , Hiroshi Shibata , Shunpei Yamazaki
- 申请人: Yoshifumi Tanada , Atsuo Isobe , Hiroshi Shibata , Shunpei Yamazaki
- 申请人地址: JP Kanagawa-ken
- 专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人地址: JP Kanagawa-ken
- 代理机构: Robinson Intellectual Property Law Office, P.C.
- 代理商 Eric J. Robinson
- 优先权: JP2001-401226 20011228
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
A method of efficiently forming a circuit using a thin film transistor with a semiconductor layer in which preferable crystallinity is obtained is provided. A location on which stress concentrates according to crystallization of a semiconductor layer formed on a substrate having unevenness corresponds to the edges and their vicinities of the unevenness provided on the substrate, that is, the boundary between a concave portion and a convex portion and its vicinities. Thus, the location in which stress concentration is caused can be specified and controlled according to the shape of a slit-shaped base layer. In addition, an island-like semiconductor layer (1305) which becomes the active layer of a TFT is formed on the concave portion or the convex portion of the substrate having the unevenness. At this time, at least a portion which becomes the channel formation region of the TFT is formed without crossing the boundary between the concave portion and the convex portion. Such TFTs are used in parallel to construct a TFT having a large channel width so that fluctuation in electrical characteristics is averaged.
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