Invention Grant
- Patent Title: Fabricating strained channel epitaxial source/drain transistors
- Patent Title (中): 制造应变通道外延源/漏极晶体管
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Application No.: US10780826Application Date: 2004-02-17
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Publication No.: US07226842B2Publication Date: 2007-06-05
- Inventor: Anand Murthy , Justin K. Brask , Andrew N. Westmeyer , Boyan Boyanov , Nick Lindert
- Applicant: Anand Murthy , Justin K. Brask , Andrew N. Westmeyer , Boyan Boyanov , Nick Lindert
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L21/8234

Abstract:
The mobility of carriers may be increased in strained channel epitaxial source/drain transistors. Doped silicon material may be blanket deposited after removing ion implanted source/drain regions. The blanket deposition forms amorphous films over non-source/drain areas and crystalline films in source/drain regions. By using an etch which is selective to amorphous silicon, the amorphous material may be removed. This may avoid some problems associated with selective deposition of the doped silicon material.
Public/Granted literature
- US20050179066A1 Fabricating strained channel epitaxial source/drain transistors Public/Granted day:2005-08-18
Information query
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