Invention Grant
US07230283B2 Semiconductor device having a metal conductor in ohmic contact with the gate region on the bottom of each groove
有权
具有与每个凹槽底部的栅极区域欧姆接触的金属导体的半导体器件
- Patent Title: Semiconductor device having a metal conductor in ohmic contact with the gate region on the bottom of each groove
- Patent Title (中): 具有与每个凹槽底部的栅极区域欧姆接触的金属导体的半导体器件
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Application No.: US11138298Application Date: 2005-05-27
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Publication No.: US07230283B2Publication Date: 2007-06-12
- Inventor: Takasumi Ohyanagi , Atsuo Watanabe , Rajesh Kumar Malhan , Tsuyoshi Yamamoto , Toshiyuki Morishita
- Applicant: Takasumi Ohyanagi , Atsuo Watanabe , Rajesh Kumar Malhan , Tsuyoshi Yamamoto , Toshiyuki Morishita
- Applicant Address: JP Tokyo JP Kariya, Aichi Pref.
- Assignee: Hitachi, Ltd.,DENSO Corporation
- Current Assignee: Hitachi, Ltd.,DENSO Corporation
- Current Assignee Address: JP Tokyo JP Kariya, Aichi Pref.
- Agency: Antonelli, Terry, Stout & Kraus, LLP.
- Priority: JP2004-272955 20040921
- Main IPC: H01L29/74
- IPC: H01L29/74 ; H01L31/111

Abstract:
A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel between a gate region formed along trench grooves, a gate contact layer and a gate electrode, which can be supplied with voltages from the outside, are formed on one surface of a semiconductor substrate or on the bottom of the trench groove. A metal conductor (virtual gate electrode) is formed in ohmic contact with a p++ contact layer of the gate region on the bottom of the trench grooves independently of the gate electrode. The virtual gate electrode is electrically isolated from the gate electrode and an external wire.
Public/Granted literature
- US20060060884A1 Semiconductor devices Public/Granted day:2006-03-23
Information query
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