Method of forming a MOS-controllable power semiconductor device for use in an integrated circuit

Invention Grant

US07235439B2 Method of forming a MOS-controllable power semiconductor device for use in an integrated circuit 有权

Title translation: 形成用于集成电路的MOS可控功率半导体器件的方法

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Patent Title: Method of forming a MOS-controllable power semiconductor device for use in an integrated circuit
Patent Title (中): 形成用于集成电路的MOS可控功率半导体器件的方法
Application No.: US11174606

Application Date: 2005-07-06
Publication No.: US07235439B2

Publication Date: 2007-06-26
Inventor: Florin Udrea , Gehan A J Amaratunga
Applicant: Florin Udrea , Gehan A J Amaratunga
Applicant Address: GB Cambridge
Assignee: Cambridge Semiconductor Limited
Current Assignee: Cambridge Semiconductor Limited
Current Assignee Address: GB Cambridge
Agency: Pillsbury Winthrop Shaw Pittman LLP
Main IPC: H01L21/8238
IPC: H01L21/8238

Method of forming a MOS-controllable power semiconductor device for use in an integrated circuit

Abstract:

A power semiconductor device has an active region that includes a drift region. At least a portion of the drift region is provided in a membrane which has opposed top and bottom surfaces. In one embodiment, the top surface of the membrane has electrical terminals connected directly or indirectly thereto to allow a voltage to be applied laterally across the drift region. In another embodiment, at least one electrical terminal is connected directly or indirectly to the top surface and at least one electrical terminal is connected directly or indirectly to the bottom surface to allow a voltage to be applied vertically across the drift region. In each of these embodiments, the bottom surface of the membrane does not have a semiconductor substrate positioned adjacent thereto.

Abstract(Chinese):

功率半导体器件具有包括漂移区域的有源区域。漂移区域的至少一部分设置在具有相对的顶表面和底表面的膜中。在一个实施例中，膜的顶表面具有直接或间接连接到其上的电端子，以允许跨越漂移区横向施加电压。在另一个实施例中，至少一个电端子直接或间接地连接到顶表面，并且至少一个电端子直接或间接地连接到底表面，以允许垂直地跨越漂移区域施加电压。在这些实施例的每一个中，膜的底表面不具有与其相邻定位的半导体衬底。

Public/Granted literature

US20050242369A1 Semiconductor device and method of forming a semiconductor device Public/Granted day:2005-11-03

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS