Invention Grant
US07247924B2 Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures
有权
控制多晶硅层中的晶粒尺寸的方法和具有多晶硅结构的半导体器件
- Patent Title: Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures
- Patent Title (中): 控制多晶硅层中的晶粒尺寸的方法和具有多晶硅结构的半导体器件
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Application No.: US10695336Application Date: 2003-10-28
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Publication No.: US07247924B2Publication Date: 2007-07-24
- Inventor: Peter J. Geiss , Joseph R. Greco , Richard S. Kontra , Emily Lanning
- Applicant: Peter J. Geiss , Joseph R. Greco , Richard S. Kontra , Emily Lanning
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Schmeiser, Olsen & Watts
- Agent William D. Sabo
- Main IPC: H01L27/082
- IPC: H01L27/082 ; H01L27/102 ; H01L29/70 ; H01L31/11 ; H01L21/331 ; H01L21/8222

Abstract:
A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
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