发明授权
US07248536B2 Integrated semiconductor memory and method for operating an integrated semiconductor memory
有权
用于操作集成半导体存储器的集成半导体存储器和方法
- 专利标题: Integrated semiconductor memory and method for operating an integrated semiconductor memory
- 专利标题(中): 用于操作集成半导体存储器的集成半导体存储器和方法
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申请号: US11245455申请日: 2005-10-06
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公开(公告)号: US07248536B2公开(公告)日: 2007-07-24
- 发明人: Stephan Schroeder , Arndt Gruber , Manfred Proell , Herbert Benzinger
- 申请人: Stephan Schroeder , Arndt Gruber , Manfred Proell , Herbert Benzinger
- 申请人地址: DE Munich
- 专利权人: Infineon Technologies AG
- 当前专利权人: Infineon Technologies AG
- 当前专利权人地址: DE Munich
- 代理机构: Slater & Matsil, L.L.P.
- 优先权: DE102004048699 20041006
- 主分类号: G11C8/00
- IPC分类号: G11C8/00
摘要:
A semiconductor memory and a method for operating the latter in order are provided, at least in testwise fashion, to deactivate a word line segment (12) of a segmented word line not via a first line (21) otherwise used for deactivation, but rather via a second line (22) via that the word line segment (12) is otherwise activated. The second line (22) can optionally be biased with a second potential (Vpp) provided for activation or with a third potential (Vgnd). If the third potential (Vgnd) is used for at least temporarily deactivating the word line segment (12), the word line segment can be driven via a switching element (17), which couples the word line segment to the second line (22), without the complementary switching element (16) of the driver segment (20) having to be used for deactivation. It can thereby be ascertained which of two switching elements (16, 17) of the driver segment is defective and whether or not the semiconductor memory will function in a manner free of errors after permanent replacement of the word line on account of a floating potential of the tested word line segment (12).
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