发明授权
US07250351B2 Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors
失效
增强的绝缘体上硅(SOI)晶体管和制造增强型SOI晶体管的方法
- 专利标题: Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors
- 专利标题(中): 增强的绝缘体上硅(SOI)晶体管和制造增强型SOI晶体管的方法
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申请号: US11106002申请日: 2005-04-14
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公开(公告)号: US07250351B2公开(公告)日: 2007-07-31
- 发明人: Toshiharu Furukawa , Carl John Radens , William Robert Tonti , Richard Quimby Williams
- 申请人: Toshiharu Furukawa , Carl John Radens , William Robert Tonti , Richard Quimby Williams
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理商 Joan Pennington
- 主分类号: H01L29/76
- IPC分类号: H01L29/76
摘要:
Enhanced silicon-on-insulator transistors and methods are provided for implementing enhanced silicon-on-insulator transistors. The enhanced silicon-on-insulator (SOI) transistors include a thin buried oxide (BOX) layer under a device channel and a thick self-aligned buried oxide (BOX) region under SOI source/drain diffusions. A selective epitaxial growth is utilized in the source/drain regions to implement appropriate strain to enhance both PFET and NFET devices simultaneously.
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