发明授权
- 专利标题: Method of designing circuit board
- 专利标题(中): 电路板设计方法
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申请号: US11019156申请日: 2004-12-23
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公开(公告)号: US07251801B2公开(公告)日: 2007-07-31
- 发明人: Kaname Ozawa , Mitsutaka Sato , Tetsuya Fujisawa , Yoshiyuki Yoneda , Ryuji Nomoto , Yoshitaka Aiba
- 申请人: Kaname Ozawa , Mitsutaka Sato , Tetsuya Fujisawa , Yoshiyuki Yoneda , Ryuji Nomoto , Yoshitaka Aiba
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Westerman, Hattori, Daniels & Adrian, LLP.
- 优先权: JP2004-238337 20040818
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
A method of design of a circuit board enabling high density conductor lines to be drawn efficiently. A rats nest is formed by connecting pads to which terminals of an electronic device are connected and external connection terminals by lines. A region with the highest density of lines of the rats nest is then selected and design rules relating to routes and dimensions of conductor lines are set in the region with the highest density of lines of the rats nest. Conductor lines are then laid at the region with the highest density of lines of the rats nest, and whether or not the conductor lines can be laid at the region with the highest density of lines of the rats nest is confirmed. Setting of the design rules and laying of conductor lines are if the conductor lines cannot be laid, and the conductor lines of the remaining regions are laid by the set design rules if the conductor lines can be laid.
公开/授权文献
- US20060040532A1 Method of designing circuit board 公开/授权日:2006-02-23
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