发明授权
- 专利标题： Resistance defect assessment device, resistance defect assessment method, and method for manufacturing resistance defect assessment device
- 专利标题（中）： 电阻缺陷评估装置，电阻缺陷评估方法和制造电阻缺陷评估装置的方法
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申请号： US10895833申请日： 2004-07-22
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公开(公告)号： US07253436B2公开(公告)日： 2007-08-07
- 发明人: Michikazu Matsumoto , Yasutoshi Okuno , Katsuyoshi Joukyu , Tetsuya Matsutani
- 申请人： Michikazu Matsumoto , Yasutoshi Okuno , Katsuyoshi Joukyu , Tetsuya Matsutani
- 申请人地址： JP Osaka
- 专利权人： Matsushita Electric Industrial Co., Ltd.
- 当前专利权人： Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址： JP Osaka
- 代理机构： McDermott Will & Emery LLP
- 优先权： JP2003-279976 20030725; JP2003-316363 20030909
- 主分类号： H01L23/58
- IPC分类号： H01L23/58
摘要：
A resistance defect assessment device provided on a wafer for assessing a resistance variation defect in a component of an integrated circuit device, the resistance defect assessment device including test patterns capable of measuring a resistance variation component to be the resistance variation defect in each chip area or each shot area of the wafer, wherein the number of test patterns included in one chip area or one shot area is set so that it is possible to estimate the yield of the integrated circuit device.
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