发明授权
US07265026B2 Method of forming a shallow trench isolation structure in a semiconductor device 有权
在半导体器件中形成浅沟槽隔离结构的方法

  • 专利标题: Method of forming a shallow trench isolation structure in a semiconductor device
  • 专利标题(中): 在半导体器件中形成浅沟槽隔离结构的方法
  • 申请号: US11024517
    申请日: 2004-12-28
  • 公开(公告)号: US07265026B2
    公开(公告)日: 2007-09-04
  • 发明人: Chee Hong Choi
  • 申请人: Chee Hong Choi
  • 申请人地址: KR Seoul
  • 专利权人: Dongbu Electronics Co., Ltd.
  • 当前专利权人: Dongbu Electronics Co., Ltd.
  • 当前专利权人地址: KR Seoul
  • 代理商 Andrew D. Fortney
  • 优先权: KR10-2003-0100492 20031230
  • 主分类号: H01L21/76
  • IPC分类号: H01L21/76
Method of forming a shallow trench isolation structure in a semiconductor device
摘要:
An isolation method in a semiconductor device is disclosed. The example method sequentially forms a pad oxide layer and a pad nitride layer on a semiconductor substrate, patterns the pad nitride and oxide layers to form an opening exposing a portion of the substrate, and forms a trench in exposed portion of the substrate. The example method also etches the patterned pad nitride layer to extend the opening, carries out SAC oxidation on the extended opening and the trench to provide a rounded corner to an upper corner of the substrate in the vicinity of the trench, and fills the trench with an insulating layer.
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