Invention Grant
US07268029B2 Method of fabricating CMOS transistor that prevents gate thinning
有权
制造防止栅极薄化的CMOS晶体管的方法
- Patent Title: Method of fabricating CMOS transistor that prevents gate thinning
- Patent Title (中): 制造防止栅极薄化的CMOS晶体管的方法
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Application No.: US10994042Application Date: 2004-11-19
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Publication No.: US07268029B2Publication Date: 2007-09-11
- Inventor: Eun-kuk Chung , Joon Kim , Suk-Chul Bang , Jong-Sun Ahn , Sang-hoon Lee , Woo-soon Jang , Yung-jun Kim
- Applicant: Eun-kuk Chung , Joon Kim , Suk-Chul Bang , Jong-Sun Ahn , Sang-hoon Lee , Woo-soon Jang , Yung-jun Kim
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Marger Johnson & McCollom, P.C.
- Priority: KR10-2003-0083042 20031121
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
Provided is a method of fabricating a CMOS transistor in which, after a polysilicon layer used as a gate is formed on a semiconductor substrate, a photoresist pattern that exposes an n-MOS transistor region is formed on the polysilicon layer. An impurity is implanted in the polysilicon layer of the n-MOS transistor region using the photoresist pattern as a mask, and the photoresist pattern is removed. If the polysilicon layer of the n-MOS transistor region is damaged by the implanting of the impurity, the polysilicon layer of the n-MOS transistor region is annealed, and a p-MOS transistor gate and an n-MOS transistor gate are formed by patterning the polysilicon layer. The semiconductor substrate, the p-MOS transistor gate and the n-MOS transistor gate is cleaned with a hydrofluoric acid (HF) solution, without causing a decrease in height of the n-MOS transistor gate.
Public/Granted literature
- US20050112814A1 Method of fabricating CMOS transistor that prevents gate thinning Public/Granted day:2005-05-26
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